fpga use arm and, ADS, documentation and code

7.3 FPGA实验
............\FPGA_EXP
............\........\Debug
............\........\.....\44BINIT.o
............\........\.....\44BLIB.o
............\........\.....\44BLIB_A.o
............\........\.....\ExIO.o
............\........\.....\Exp23_1.axf
............\........\.....\Main.o
............\........\.....\MEMCFG.o
............\........\.....\OPTION.o
............\........\.....\system.bin
............\........\Exp23_1.apj
............\........\Inc
............\........\...\44BLIB.H
............\........\...\DEF.H
............\........\...\ExIO.h
............\........\Release
............\........\.......\44BINIT.o
............\........\.......\44BLIB.o
............\........\.......\44BLIB_A.o
............\........\.......\Exp23_1.axf
............\........\.......\Main.o
............\........\.......\MEMCFG.o
............\........\.......\OPTION.o
............\........\.......\system.bin
............\........\Src
............\........\...\44BLIB.C
............\........\...\44BLIB_A.S
............\........\...\ExIO.c
............\........\...\Main.c
............\........\Startup
............\........\.......\44b.h
............\........\.......\44BINIT.S
............\........\.......\MEMCFG.S
............\........\.......\OPTION.H
............\........\.......\OPTION.S
............\FPGA_VHDL
............\.........\armExIO.prd
............\.........\armExIO.prj
............\.........\armExIO.vhd
............\.........\rev_1
............\.........\.....\.recordref
............\.........\.....\armExIO.acf
............\.........\.....\armExIO.asm.rpt
............\.........\.....\armExIO.cdf
............\.........\.....\armexio.csf
............\.........\.....\armExIO.done
............\.........\.....\armExIO.eco
............\.........\.....\armExIO.edf
............\.........\.....\armexio.esf
............\.........\.....\armExIO.fit.eqn
............\.........\.....\armExIO.fit.rpt
............\.........\.....\armExIO.fse
............\.........\.....\armExIO.map.eqn
............\.........\.....\armExIO.map.rpt
............\.........\.....\armExIO.pin
............\.........\.....\armExIO.pof
............\.........\.....\armExIO.psf
............\.........\.....\armExIO.quartus
............\.........\.....\armExIO.qws
............\.........\.....\armExIO.sat
............\.........\.....\armExIO.sof
............\.........\.....\armExIO.srd
............\.........\.....\armExIO.srm
............\.........\.....\armExIO.srr
............\.........\.....\armExIO.srs
............\.........\.....\armExIO.tan.rpt
............\.........\.....\armExIO.tcl
............\.........\.....\armExIO.tlg
............\.........\.....\armExIO_cons.tcl
............\.........\.....\armExIO_rm.tcl
............\.........\.....\armExIO_rm_prev.tcl
............\.........\.....\cmp_state.ini
............\.........\.....\db
............\.........\.....\..\armExIO.armExIO.csf.hdb
............\.........\.....\..\armExIO.armExIO.csf.rdb
............\.........\.....\..\armExIO.armExIO.db_entries.csf.cdb
............\.........\.....\..\armExIO.armExIO.sgate_entries.csf.cdb
............\.........\.....\..\armExIO.armExIO.sgate_entries.csf.hdb
............\.........\.....\..\armExIO.armExIO.sld_design_entry.sci
............\.........\.....\..\armExIO.armExIO.tdb_netlist.csf.tdb
............\.........\.....\..\armExIO.armExIO.tim_manager.csf.ddb
............\.........\.....\..\armExIO.asm.qmsg
............\.........\.....\..\armExIO.csf.qmsg
............\.........\.....\..\armExIO.db_info
............\.........\.....\..\armExIO.fit.qmsg
............\.........\.....\..\armExIO.hif
............\.........\.....\..\armExIO.map.qmsg
............\.........\.....\..\armExIO.psf.hdb
............\.........\.....\..\armExIO.tan.qmsg
............\.........\.....\..\armExIO_cmp.qrpt
............\.........\.....\..\armExIO_hier_info
............\.........\.....\..\armExIO_syn_hier_info
............\.........\.....\syntmp
............\.........\.....\......\armExIO.plg
............\文档
............\....\FPGA原理图.pdf
............\....\FPGA布局.pdf

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