Introduction - If you have any usage issues, please Google them yourself
this program will function as audio data into IIS bt656 together data transmission. In the process, not from outside sdata input, but by an 16 to the counter and have a string of conversion, procedures in order to detect the change sdata series and whether there are any omissions. The procedure has not been measured, but the ModelSim simulation results correctly.
Packet : 33753157iis2bt656.rar filelist
IIS2BT656\buffer.v
IIS2BT656\final_iisbt_tb.v
IIS2BT656\iisbt656.v
IIS2BT656\p2sprj.cr.mti
IIS2BT656\p2sprj.mpf
IIS2BT656\p2sprj_tb.v
IIS2BT656\p_2_s.v
IIS2BT656\sim0914.cr.mti
IIS2BT656\sim0914.mpf
IIS2BT656\state_machine.v
IIS2BT656\s_2_p.v
IIS2BT656\transcript
IIS2BT656\vsim.wlf
IIS2BT656\wave.do
IIS2BT656\work\buffer\verilog.asm
IIS2BT656\work\buffer\_primary.dat
IIS2BT656\work\buffer\_primary.vhd
IIS2BT656\work\buffer
IIS2BT656\work\final_iisbt_tb\verilog.asm
IIS2BT656\work\final_iisbt_tb\_primary.dat
IIS2BT656\work\final_iisbt_tb\_primary.vhd
IIS2BT656\work\final_iisbt_tb
IIS2BT656\work\iisbt656\verilog.asm
IIS2BT656\work\iisbt656\_primary.dat
IIS2BT656\work\iisbt656\_primary.vhd
IIS2BT656\work\iisbt656
IIS2BT656\work\parelell2serial\verilog.asm
IIS2BT656\work\parelell2serial\_primary.dat
IIS2BT656\work\parelell2serial\_primary.vhd
IIS2BT656\work\parelell2serial
IIS2BT656\work\ram_dual\verilog.asm
IIS2BT656\work\ram_dual\_primary.dat
IIS2BT656\work\ram_dual\_primary.vhd
IIS2BT656\work\ram_dual
IIS2BT656\work\state_machine\verilog.asm
IIS2BT656\work\state_machine\_primary.dat
IIS2BT656\work\state_machine\_primary.vhd
IIS2BT656\work\state_machine
IIS2BT656\work\s_2_p\verilog.asm
IIS2BT656\work\s_2_p\_primary.dat
IIS2BT656\work\s_2_p\_primary.vhd
IIS2BT656\work\s_2_p
IIS2BT656\work\_info
IIS2BT656\work
IIS2BT656