msp430 I single-chip analog IO bus with timing, with the FPGA interactive process, with the source code, verilog, a simple document.

单片机FPGA接口
..............\interface.v
..............\interface2.v
..............\interface2.v.bak
..............\单片机与FPGA接口文档.docx
..............\单片机与FPGA接口文档.pdf
..............\截图



..............\....\接口连线图.vsd

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