This is a description of the pll value vhdl language description, please download ah

EP1C3_12_10_PHAS_PLL
....................\ADDER10B.VHD
....................\ADDER32B.VHD
....................\cmp_state.ini
....................\DATA
....................\....\LUT10X10.HEX
....................\....\LUT10X10.MIF
....................\dds_vhdl.asm.rpt
....................\DDS_VHDL.CDF
....................\dds_vhdl.done
....................\dds_vhdl.fit.summary
....................\dds_vhdl.flow.rpt
....................\dds_vhdl.map.summary
....................\DDS_VHDL.PIN
....................\DDS_VHDL.QPF
....................\DDS_VHDL.QSF
....................\DDS_VHDL.QWS
....................\DDS_VHDL.SOF
....................\dds_vhdl.tan.summary
....................\DDS_VHDL.VHD
....................\dds_vhdl_assignment_defaults.qdf
....................\PLL20.BSF
....................\PLL20.VHD
....................\README
....................\......\GW48使用readme.txt
....................\REG10B.VHD
....................\REG32B.VHD
....................\SIN_ROM.VHD

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