This is a very good VHDL source code, the friends of the school can look at the under, a relatively simple things that are very suitable for beginners

Packet : 39709562alarmclk.rar filelist
alarmclk
alarmclk\automake.log
alarmclk\stor.jhd
alarmclk\stor.naf
alarmclk\alrmstor.jhd
alarmclk\alrmstor.naf
alarmclk\dsplymux.jhd
alarmclk\dsplymux.naf
alarmclk\alarmclk.jhd
alarmclk\alarmclk.naf
alarmclk\comptime.jhd
alarmclk\ahdljhd.tmp
alarmclk\comptime.naf
alarmclk\timestor.jhd
alarmclk\timestor.naf
alarmclk\alarmclk.jid
alarmclk\g_input.sym
alarmclk\alarmclk.abv
alarmclk\alarmclk.cpc
alarmclk\alarmclk.lci
alarmclk\alarmclk.lct
alarmclk\alarmclk.sch
alarmclk\alarmclk.sty
alarmclk\alarmclk.sym
alarmclk\alarmclk.syn
alarmclk\alarmclk.tf
alarmclk\alarmclk.tre
alarmclk\alarmclk.vhd
alarmclk\ALARMCLK.wav
alarmclk\alarmclk.wdl
alarmclk\alarmclk.wet
alarmclk\alrmstor.sch
alarmclk\alrmstor.sym
alarmclk\comptime.abl
alarmclk\comptime.cpc
alarmclk\comptime.sym
alarmclk\dsplymux.cpc
alarmclk\dsplymux.sch
alarmclk\dsplymux.sym
alarmclk\dsplymux.tre
alarmclk\loadtime.sym
alarmclk\pla.hst
alarmclk\spec.txt
alarmclk\stor.sch
alarmclk\stor.sym
alarmclk\test.abv
alarmclk\timestor.abl
alarmclk\timestor.sym
alarmclk\vsim.wlf
alarmclk\syndos.env

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