This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX Inc. SPARTANII series, the package contains a complete project file

Vme_Interface
.............\.lso
.............\ARM_ERAM.asy
.............\ARM_ERAM.ngc
.............\ARM_ERAM.sym
.............\ARM_ERAM.v
.............\ARM_ERAM.veo
.............\ARM_ERAM.vhd
.............\ARM_ERAM.vho
.............\ARM_ERAM.xco
.............\ARM_ERAM_flist.txt
.............\ARM_ERAM_readme.txt
.............\ARM_ERAM_xmdf.tcl
.............\CHIPSCOPE_ARM.cdc
.............\CHIPSCOPE_ARM.cpj
.............\CHIPSCOPE_ARM_RES.cdc
.............\CHIPSCOPE_INT.cdc
.............\CHIPSCOPE_INT.cpj
.............\CHIPSCOPE_VME.cdc
.............\CHIPSCOPE_VME.cpj
.............\CHIPSCOPE_vmeINT.cdc
.............\CHIPSCOPE_vmeint.cpj
.............\compxlib.cfg
.............\compxlib.log
.............\coregen.cgp
.............\coregen.log
.............\coregen.rsp
.............\MARK_RAM.asy
.............\MARK_RAM.ngc
.............\MARK_RAM.sym
.............\MARK_RAM.v
.............\MARK_RAM.veo
.............\MARK_RAM.vhd
.............\MARK_RAM.vho
.............\MARK_RAM.xco
.............\MARK_RAM_flist.txt
.............\MARK_RAM_readme.txt
.............\MARK_RAM_xmdf.tcl
.............\Mcs_File
.............\........\090405_1.mcs
.............\........\090405_2.mcs
.............\modelsim.ini
.............\pepExtractor.prj
.............\templates
.............\.........\coregen.xml
.............\tmp
.............\...\_cg
.............\vme_interface.bgn
.............\vme_interface.bit
.............\Vme_Interface.bld
.............\Vme_Interface.cmd_log
.............\vme_interface.drc
.............\Vme_Interface.ise
.............\Vme_Interface.ise_ISE_Backup
.............\Vme_Interface.lfp
.............\Vme_Interface.lso
.............\Vme_Interface.ncd
.............\Vme_Interface.ngc
.............\Vme_Interface.ngd
.............\Vme_Interface.ngr
.............\Vme_Interface.ntrc_log
.............\Vme_Interface.pad
.............\Vme_Interface.par
.............\Vme_Interface.pcf
.............\Vme_Interface.prj
.............\Vme_Interface.prm
.............\Vme_Interface.ptwx
.............\Vme_Interface.restore
.............\Vme_Interface.sig
.............\Vme_Interface.stx
.............\Vme_Interface.syr
.............\Vme_Interface.twr
.............\Vme_Interface.twx
.............\Vme_Interface.ucf
.............\Vme_Interface.unroutes
.............\Vme_Interface.ut
.............\Vme_Interface.vhd
.............\Vme_Interface.xpi
.............\Vme_Interface.xst
.............\vme_interface_090310.prm
.............\vme_interface_090310.sig
.............\Vme_Interface_bkp.ngd
.............\vme_interface_cclktemp.bit
.............\Vme_Interface_guide.ncd
.............\Vme_Interface_ise10migration.zip
.............\Vme_Interface_map.map
.............\Vme_Interface_map.mrp
.............\Vme_Interface_map.ncd
.............\Vme_Interface_map.ngm
.............\Vme_Interface_ngdbuild.xrpt
.............\Vme_Interface_pad.csv
.............\Vme_Interface_pad.txt
.............\Vme_Interface_par.xrpt
.............\Vme_Interface_summary.html
.............\Vme_Interface_summary.xml
.............\Vme_Interface_usage.xml
.............\Vme_Interface_vhdl.prj
.............\Vme_Interface_xdb
.............\.................\cst.xbcd
.............\.................\tmp

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