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chip_sample

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 6.53mb
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  • Author :tra***
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Introduction - If you have any usage issues, please Google them yourself
SoC sample Code using Altera Xcaliber, good usefull SoC.
Packet file list
(Preview for download)
images
......\bmp2hex.pl

prog_files
..........\animate_image_data.hex
..........\prog_hw.bat
..........\prog_hw.bat.bak
quartus
.......\Debug.fsf
.......\Release.fsf
.......\stripe.bsf
.......\stripe.h
.......\stripe.s
.......\stripe.vhd
.......\video_system.csf
.......\video_system.psf
.......\video_system.quartus
.......\video_system.quartus.bak
.......\video_system.sbd
rtl_sim
.......\memory.dpram0
.......\memory.dpram1
.......\memory.regs
.......\memory.sram0
.......\memory.sram1
.......\modelsim.ini
.......\mt48lc16m16a2.vhd
.......\simulate_video_system.do
.......\testbench.vhd
.......\wave.do
software
........\armc_startup.s
........\exceptions.c
........\int_ctrl00.h
........\irq.c
........\irq.h
........\main.c
........\main.c.bak
........\retarget.c
........\sim_test.s
........\uart00.h
........\uartcomm.c
........\uartcomm.h
source
......\default_slave.vhd
......\image_package.vhd
......\line_buffer.vhd
......\response_and_data_mux.vhd
......\slave_decoder.vhd
......\slave_interface.vhd
......\system_pll.vhd
......\vga_driver.vhd
......\vga_pll.vhd
......\video_components.vhd
......\video_dma.vhd
......\video_dma.vhd.bak
......\video_dma_controller.vhd
......\video_system.vhd
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