verficaiton acceration tools for linux for FPGA

BUILDING.txt
design
......\AUTO
......\....\buff1
......\....\.....\DUV1.v
......\....\.....\IMAGE.v
......\....\.....\TB.v
......\GATE_P
......\......\buff1
......\......\.....\buff1_timesim.nlf
......\......\.....\buff1_timesim.sdf
......\......\.....\buff1_timesim.v
......\......\.....\TB.v
......\......\.....\TB.v.bak
......\......\buff2
......\......\.....\buff2_timesim.nlf
......\......\.....\buff2_timesim.sdf
......\......\.....\buff2_timesim.v
......\......\.....\TB.v
......\......\.....\TB.v.bak
......\......\buff3
......\......\.....\buff3_timesim.nlf
......\......\.....\buff3_timesim.sdf
......\......\.....\buff3_timesim.v
......\......\.....\TB.v
......\......\.....\TB.v.bak
......\......\glbl
......\......\....\glbl.v
......\......\....\glbl.v.bak
......\......\....\TB.v
......\GATE_S
......\......\buffer_timesim.nlf
......\......\buffer_timesim.sdf
......\......\buffer_timesim.v
......\......\TB.v
......\RTL
......\...\DUV.v
......\...\DUV1.v
......\...\DUV2.v
......\...\DUV3.v
......\...\TB.v
doc
...\CVS_Manual.hwp
...\GLSA.ppt
...\Macro.xlsx
...\NCVLOG.hwp
...\ncvlog_options.hwp
...\work.zip
GLOSSARY.txt
ISSUE.txt
ISSUE.txt.bak
README.txt
src
...\GATE_P
...\......\buff1
...\......\.....\.ncelab_fullargs
...\......\.....\.tmpfile
...\......\.....\cds_prof.lib
...\......\.....\comp_dir
...\......\.....\dump
...\......\.....\hdl_prof.var
...\......\.....\INCA_libs_prof
...\......\.....\..............\worklib
...\......\.....\..............\.......\.cdsvmod
...\......\.....\..............\.......\.inca.db.165.lnx86
...\......\.....\..............\.......\cdsinfo.tag
...\......\.....\..............\.......\inca.lnx86.165.pak
...\......\.....\inc_prep_dir
...\......\.....\............\pvr.v
...\......\.....\............\switch.v
...\......\.....\inc_prof_dir
...\......\.....\log
...\......\.....\...\prof_ncelab.log
...\......\.....\...\prof_ncelab.stdout
...\......\.....\...\prof_ncprep.log
...\......\.....\...\prof_ncprep.stdout
...\......\.....\...\prof_ncsim.log
...\......\.....\...\prof_ncsim.stdout
...\......\.....\...\prof_ncvlog.log
...\......\.....\Makefile
...\......\.....\ncelab_prof.args
...\......\.....\ncprof.out.prof
...\......\.....\ncsim_prof.args
...\......\.....\ncvlog_prof.args
...\......\.....\prep_dir
...\......\.....\........\array_c.lst
...\......\.....\........\bbi.lst
...\......\.....\........\bbr_iname.lst
...\......\.....\........\bb_iname.lst
...\......\.....\........\bb_tmp.lst
...\......\.....\........\blackbox.lst
...\......\.....\........\candi.lst
...\......\.....\........\dd.lst
...\......\.....\........\dd_candi.lst
...\......\.....\........\di.lst
...\......\.....\........\max_delay.lst
...\......\.....\........\memory.lst
...\......\.....\........\oom.lst
...\......\.....\........\param.v
...\......\.....\........\prt_iname.lst

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