Counter Applet

fq_counter\.lso
..........\abc.vhd
..........\abc.xaw
..........\abc_arwz.ucf
..........\abc_b.cmd_log
..........\abc_b.lso
..........\abc_b.ngc
..........\abc_b.ngr
..........\abc_b.prj
..........\abc_b.stx
..........\abc_b.syr
..........\abc_b.vhd
..........\abc_b.xst
..........\abc_b_summary.html
..........\abc_b_vhdl.prj
..........\abc_tb.vhd
..........\abc_tb_vhd.fdo
..........\abc_tb_vhd.udo
..........\blk_mem_gen_ds512.pdf
..........\blk_mem_gen_release_notes.txt
..........\change1_summary.html
..........\cnt_tb.vhd
..........\cnt_tb_summary.html
..........\compxlib.cfg
..........\compxlib.log
..........\counter.prj
..........\counter.stx
..........\counter.tfi
..........\counter.udo
..........\counter.vhd
..........\counter.vhi
..........\counter.xst
..........\counter_summary.html
..........\counter_testbench.vhd
..........\counter_testbench.vhd.bak
..........\counter_testbench_vhd.fdo
..........\counter_testbench_vhd.prj
..........\counter_testbench_vhd.stx
..........\counter_testbench_vhd.udo
..........\counter_testbench_vhd.xst
..........\counter_testbench_vhd_summary.html
..........\counter_testbench_vhd_vhdl.prj
..........\counter_vhdl.prj
..........\f1.ucf
..........\fq_counter.ise
..........\fq_counter.ise_ISE_Backup
..........\fq_counter.ntrc_log
..........\fq_counter.restore
..........\kjk.vhd
..........\pepExtractor.prj
..........\ram.coe
..........\spe_wq.cmd_log
..........\spe_wq.lfp
..........\spe_wq.lso
..........\spe_wq.prj
..........\spe_wq.syr
..........\spe_wq.ucf
..........\spe_wq.udo
..........\spe_wq.vhd
..........\spe_wq.xst
..........\spe_wq_summary.html
..........\spe_wq_vhdl.prj
..........\tb1.vhd
..........\.emplates\coregen.xml
..........\Thumbs.db
..........\tmp\_cg\wq.mif
..........\transcript
..........\vsim.wlf
..........\work\abc\behavioral.dat
..........\....\...\_primary.dat
..........\....\..._b\behavioral.dat
..........\....\.....\_primary.dat
..........\....\....tb_vhd\behavior.dat
..........\....\..........\_primary.dat
..........\....\counter\behavioral.dat
..........\....\.......\_primary.dat
..........\....\......._testbench_vhd\behavior.dat
..........\....\.....................\_primary.dat
..........\....\spe_wq\_primary.dat
..........\....\wq\wq_a.dat
..........\....\..\_primary.dat
..........\....\_info
..........\....\.opt\work_counter_behavioral.asm
..........\....\....\work_counter_testbench_vhd_behavior.asm
..........\....\....\work__info
..........\....\....\_deps
..........\....\....\__model_tech_.._ieee__info
..........\....\....\__model_tech_.._std__info
..........\....\....1\work_counter_behavioral.asm
..........\....\.....\work__info
..........\....\.....\_deps
..........\....\.....\__model_tech_.._ieee__info
..........\....\.....\__model_tech_.._std__info
..........\....\....2\c__modeltech_6.2b_xilinx_lib_unisim_bufg_bufg_v.asm
..........\....\.....\c__modeltech_6.2b_xilinx_lib_unisim_dcm_clock_divide_by_2_dcm_clock_divide_by_2_v.asm
..........\....\.....\c__modeltech_6.2b_xilinx_lib_unisim_dcm_clock_lost_dcm_clock_lost_v.asm
..........\....\.....\c__modeltech_6.2b_xilinx_lib_unisim_dcm_dcm_v__1.asm
..........\....\.....\c__modeltech_6.2b_xilinx_lib_unisim_dcm_maximum_period_check_dcm_maximum_period_check_v.asm
..........\....\.....\c__modeltech_6.2b_xilinx_lib_unisim_ibufg_ibufg_v.asm
..........\....\.....\c__modeltech_6.2b_xilinx_lib_unisim_vcomponents__vhdl.asm

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