VHDL language using a decimal counter, follow-up there is divider, data selector, seven-segment digital display procedures, the software platform is Quartus II 7.2, the final adoption of these small modules can be combined to produce a clock or other arbitrary binary counter, suitable for beginners, through these procedures, new to VHDL learners can be a step by step to the awareness and understanding of VHDL, the last through the design of a practical function of the circuit, to increase the learner' s sense of achievement and interest in learning. All programs have successfully passed the hardware and software debugging, hardware platform is designed by a development of their own school board, it is necessary to know can contact me. Contact QQ: 782649157

qq cnt10\cnt10.asm.rpt
........\cnt10.bsf
........\cnt10.done
........\cnt10.fit.rpt
........\cnt10.fit.smsg
........\cnt10.fit.summary
........\cnt10.flow.rpt
........\cnt10.map.rpt
........\cnt10.map.summary
........\cnt10.pin
........\cnt10.qpf
........\cnt10.qsf
........\cnt10.qws
........\cnt10.sim.rpt
........\cnt10.tan.rpt
........\cnt10.tan.summary
........\cnt10.vhd
........\cnt10.vwf
........\db\cnt10.asm.qmsg
........\..\cnt10.cbx.xml
........\..\cnt10.cmp.bpm
........\..\cnt10.cmp.cdb
........\..\cnt10.cmp.ecobp
........\..\cnt10.cmp.hdb
........\..\cnt10.cmp.logdb
........\..\cnt10.cmp.rdb
........\..\cnt10.cmp.tdb
........\..\cnt10.cmp0.ddb
........\..\cnt10.cmp_bb.cdb
........\..\cnt10.cmp_bb.hdb
........\..\cnt10.cmp_bb.logdb
........\..\cnt10.cmp_bb.rcf
........\..\cnt10.dbp
........\..\cnt10.db_info
........\..\cnt10.eco.cdb
........\..\cnt10.eds_overflow
........\..\cnt10.fit.qmsg
........\..\cnt10.hier_info
........\..\cnt10.hif
........\..\cnt10.map.bpm
........\..\cnt10.map.cdb
........\..\cnt10.map.ecobp
........\..\cnt10.map.hdb
........\..\cnt10.map.logdb
........\..\cnt10.map.qmsg
........\..\cnt10.map_bb.cdb
........\..\cnt10.map_bb.hdb
........\..\cnt10.map_bb.logdb
........\..\cnt10.pre_map.cdb
........\..\cnt10.pre_map.hdb
........\..\cnt10.psp
........\..\cnt10.pss
........\..\cnt10.rtlv.hdb
........\..\cnt10.rtlv_sg.cdb
........\..\cnt10.rtlv_sg_swap.cdb
........\..\cnt10.sgdiff.cdb
........\..\cnt10.sgdiff.hdb
........\..\cnt10.signalprobe.cdb
........\..\cnt10.sim.cvwf
........\..\cnt10.sim.hdb
........\..\cnt10.sim.qmsg
........\..\cnt10.sim.rdb
........\..\cnt10.sld_design_entry.sci
........\..\cnt10.sld_design_entry_dsc.sci
........\..\cnt10.syn_hier_info
........\..\cnt10.tan.qmsg
........\..\cnt10.tis_db_list.ddb
........\..\prev_cmp_cnt10.qmsg
........\..\prev_cmp_cnt10.sim.qmsg
........\..\wed.wsf
........\db
qq cnt10

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