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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 225kb
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  • Author :Q***
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Introduction - If you have any usage issues, please Google them yourself
Written in VHDL language using a 1/16 divider, follow-up there is the counter, data selector, seven-segment digital display procedures, the software platform is Quartus II 7.2, the final adoption of these small modules can be combined to produce a clock or other arbitrary binary counter, suitable for beginners, through these procedures, new to VHDL learners can be a step by step to the awareness and understanding of VHDL, the last through the design of a practical function of the circuit, to increase the learner' s sense of achievement and motivation in learning. All programs have successfully passed the hardware and software debugging, hardware platform is designed by a development of their own school board, it is necessary to know can contact me. Contact QQ: 782649157
Packet file list
(Preview for download)
qq MUX2\db\MUX2.asm.qmsg
.......\..\MUX2.cbx.xml
.......\..\MUX2.cmp.bpm
.......\..\MUX2.cmp.cdb
.......\..\MUX2.cmp.ecobp
.......\..\MUX2.cmp.hdb
.......\..\MUX2.cmp.logdb
.......\..\MUX2.cmp.rdb
.......\..\MUX2.cmp.tdb
.......\..\MUX2.cmp0.ddb
.......\..\MUX2.cmp_bb.cdb
.......\..\MUX2.cmp_bb.hdb
.......\..\MUX2.cmp_bb.logdb
.......\..\MUX2.cmp_bb.rcf
.......\..\MUX2.dbp
.......\..\MUX2.db_info
.......\..\MUX2.eco.cdb
.......\..\MUX2.fit.qmsg
.......\..\MUX2.hier_info
.......\..\MUX2.hif
.......\..\MUX2.map.bpm
.......\..\MUX2.map.cdb
.......\..\MUX2.map.ecobp
.......\..\MUX2.map.hdb
.......\..\MUX2.map.logdb
.......\..\MUX2.map.qmsg
.......\..\MUX2.map_bb.cdb
.......\..\MUX2.map_bb.hdb
.......\..\MUX2.map_bb.logdb
.......\..\MUX2.pre_map.cdb
.......\..\MUX2.pre_map.hdb
.......\..\MUX2.psp
.......\..\MUX2.pss
.......\..\MUX2.rtlv.hdb
.......\..\MUX2.rtlv_sg.cdb
.......\..\MUX2.rtlv_sg_swap.cdb
.......\..\MUX2.sgdiff.cdb
.......\..\MUX2.sgdiff.hdb
.......\..\MUX2.signalprobe.cdb
.......\..\MUX2.sim.cvwf
.......\..\MUX2.sim.hdb
.......\..\MUX2.sim.qmsg
.......\..\MUX2.sim.rdb
.......\..\MUX2.sld_design_entry.sci
.......\..\MUX2.sld_design_entry_dsc.sci
.......\..\MUX2.syn_hier_info
.......\..\MUX2.tan.qmsg
.......\..\MUX2.tis_db_list.ddb
.......\..\prev_cmp_MUX2.qmsg
.......\..\prev_cmp_MUX2.sim.qmsg
.......\..\wed.wsf
.......\MUX2.asm.rpt
.......\MUX2.bsf
.......\MUX2.done
.......\MUX2.fit.rpt
.......\MUX2.fit.smsg
.......\MUX2.fit.summary
.......\MUX2.flow.rpt
.......\MUX2.map.rpt
.......\MUX2.map.summary
.......\MUX2.pin
.......\MUX2.qpf
.......\MUX2.qsf
.......\MUX2.qws
.......\MUX2.sim.rpt
.......\MUX2.tan.rpt
.......\MUX2.tan.summary
.......\MUX2.vhd
.......\MUX2.vwf
.......\db
qq MUX2
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