Introduction - If you have any usage issues, please Google them yourself
CPUname is a RISC processor, using the Princeton architecture, CPU and data memory, the communication between the use of Load/Store instruction implementation, data storage to a unified format, 32-bit word length, 32-bit fixed-length instructions, the address instruction format. Using a dedicated data path structure, four lines, is divided into fetching and decoding, take the number of operations, write-back four-step, with related specialty channels to address the data-related problems, and jump instructions use branch prediction techniques, so as not to affect the water.