Verilog language implementation with a simple analog clock. And the achievement of the document contains the project file.

ClockRun\工程\_clockru.par
........\....\_edif.prp
........\....\automake.log
........\....\clockrun.ary
........\....\clockrun.cln
........\....\clockrun.cpn
........\....\clockrun.dmy
........\....\clockrun.edf
........\....\clockrun.edn
........\....\clockrun.jhd
........\....\clockrun.jid
........\....\clockrun.laf
........\....\clockrun.lafiar
........\....\clockrun.LDB
........\....\clockrun.log
........\....\ClockRun.naf
........\....\clockrun.ppn
........\....\clockrun.prp
........\....\clockrun.rsp
........\....\clockrun.srm
........\....\clockrun.srs
........\....\ClockRun.STY
........\....\ClockRun.syn
........\....\clockrun.tc_
........\....\ClockRun.TCL
........\....\clockrun.tlg
........\....\clockrun.v
........\....\ClockRun.vci
........\....\ClockRun.vct
........\....\clockrun.vhm
........\....\clockrun.vm
........\....\constmgr.cmd
........\....\crtestvector.abv
........\....\CRTESTVECTOR.bin
........\....\CRTESTVECTOR.lt2
........\....\crtestvector.lts
........\....\CRTESTVECTOR.nam
........\....\crtestvector.slg
........\....\crtestvector.tmv
........\....\crtestvector.trf
........\....\CRTESTVECTOR.wav
........\....\edif2laf.log
........\....\edif2lsf.log
........\....\lo_dpm.rsp
........\....\simcp._sp
........\....\stderr.log
........\....\stdout.log
........\作业6.doc
........\工程
ClockRun

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