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Verilog_HDl_Code

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 28kb
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Verilog HDL Code
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实例程序代码\第15章 常用加法器设计\carry_chain_adder.v
............\.....................\carry_skip_adder.v
............\.....................\ripple_carry_adder.v
............\第15章 常用加法器设计
............\...6章 常用乘法器设计\basic_base2_mul.v
............\.....................\basic_base2_mul_seq.v
............\.....................\carry_save_mult.v
............\.....................\ripple_carry_mult.v
............\第16章 常用乘法器设计
............\...7章 伽罗华域GF(q)乘法器设计\ff_const_mul.v
............\................................\ff_mul.v
............\第17章 伽罗华域GF(q)乘法器设计
............\...8章 除法器设计\rest_div_int.v
............\.................\seq_div.v
............\第18章 除法器设计
............\...9章 积分梳状滤波器(CIC)设计\cic3_decimator.v
............\第19章 积分梳状滤波器(CIC)设计
............\..20章 CORDIC数字计算机的设计\cordic.v
............\第20章 CORDIC数字计算机的设计
............\...1章 伪随机序列应用设计\randomization.v
............\第21章 伪随机序列应用设计
............\...2章 异步FIFO设计\async_cmp.v
............\...................\async_fifo.v
............\...................\dp_ram.v
............\...................\rptr_empty.v
............\...................\wptr_full.v
............\第22章 异步FIFO设计
............\...3章 RS(204188)译码器的设计\BM_KES.v
............\..............................\CheinSearch.v
............\..............................\ROM_INV.mif
............\..............................\RS(204188)译码器说明.txt
............\..............................\SyndromeCalc.v
............\..............................\ff_mul.v
............\..............................\forney.v
............\..............................\rom_inv.v
............\..............................\rom_power.mif
............\..............................\rom_power.v
............\..............................\rs_decoder.v
............\第23章 RS(204188)译码器的设计
实例程序代码
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