UART controller based on AMBA APB

au\.restartSimSession.tcl.old
..\.vcsmx_rebuild
..\sim\nc\.vcsmx_rebuild
..\...\vcs\vcsd
..\.rc\verilog\au.v
..\.yn\synplify\.recordref
..\tb\au_tb.v
..\doc\design
..\...\verification
..\sim\modelsim
..\...\nc
..\...\vcs
..\.rc\verilog
..\...\vhdl
..\.yn\ise
..\...\synopsys
..\...\synplify
..\c
..\doc
..\sim
..\src
..\syn
..\tb
au

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