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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 1.29mb
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  • Author :潘***
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Verilog-hdl cassette based on telephone circuits, build environment quartusII72, has been downloaded by simulation.
Packet file list
(Preview for download)
cardTEL\account_top.bdf
.......\cardTEL.asm.rpt
.......\cardTEL.bsf
.......\cardTEL.done
.......\cardTEL.fit.rpt
.......\cardTEL.fit.smsg
.......\cardTEL.fit.summary
.......\cardTEL.flow.rpt
.......\cardTEL.map.rpt
.......\cardTEL.map.smsg
.......\cardTEL.map.summary
.......\cardTEL.pin
.......\cardTEL.pof
.......\cardTEL.qar
.......\cardTEL.qarlog
.......\cardTEL.qpf
.......\cardTEL.qsf
.......\cardTEL.qws
.......\cardTEL.sim.cvwf
.......\cardTEL.sim.rpt
.......\cardTEL.sof
.......\cardTEL.tan.rpt
.......\cardTEL.tan.summary
.......\cardTEL.v
.......\cardTEL.v.bak
.......\cardTEL.vwf
.......\db\cardTEL.asm.qmsg
.......\..\cardTEL.asm_labs.ddb
.......\..\cardTEL.cbx.xml
.......\..\cardTEL.cmp.bpm
.......\..\cardTEL.cmp.cdb
.......\..\cardTEL.cmp.ecobp
.......\..\cardTEL.cmp.hdb
.......\..\cardTEL.cmp.logdb
.......\..\cardTEL.cmp.rdb
.......\..\cardTEL.cmp.tdb
.......\..\cardTEL.cmp0.ddb
.......\..\cardTEL.cmp2.ddb
.......\..\cardTEL.cmp_bb.cdb
.......\..\cardTEL.cmp_bb.hdb
.......\..\cardTEL.cmp_bb.logdb
.......\..\cardTEL.cmp_bb.rcf
.......\..\cardTEL.dbp
.......\..\cardTEL.db_info
.......\..\cardTEL.eco.cdb
.......\..\cardTEL.eds_overflow
.......\..\cardTEL.fit.qmsg
.......\..\cardTEL.hier_info
.......\..\cardTEL.hif
.......\..\cardTEL.map.bpm
.......\..\cardTEL.map.cdb
.......\..\cardTEL.map.ecobp
.......\..\cardTEL.map.hdb
.......\..\cardTEL.map.logdb
.......\..\cardTEL.map.qmsg
.......\..\cardTEL.map_bb.cdb
.......\..\cardTEL.map_bb.hdb
.......\..\cardTEL.map_bb.logdb
.......\..\cardTEL.pre_map.cdb
.......\..\cardTEL.pre_map.hdb
.......\..\cardTEL.psp
.......\..\cardTEL.pss
.......\..\cardTEL.qpf
.......\..\cardTEL.rtlv.hdb
.......\..\cardTEL.rtlv_sg.cdb
.......\..\cardTEL.rtlv_sg_swap.cdb
.......\..\cardTEL.sgdiff.cdb
.......\..\cardTEL.sgdiff.hdb
.......\..\cardTEL.signalprobe.cdb
.......\..\cardTEL.sim.cvwf
.......\..\cardTEL.sim.hdb
.......\..\cardTEL.sim.qmsg
.......\..\cardTEL.sim.rdb
.......\..\cardTEL.sld_design_entry.sci
.......\..\cardTEL.sld_design_entry_dsc.sci
.......\..\cardTEL.syn_hier_info
.......\..\cardTEL.tan.qmsg
.......\..\cardTEL.tis_db_list.ddb
.......\..\prev_cmp_cardTEL.fit.qmsg
.......\..\prev_cmp_cardTEL.map.qmsg
.......\..\prev_cmp_cardTEL.qmsg
.......\..\prev_cmp_cardTEL.tan.qmsg
.......\..\wed.wsf
.......\devide5M.bsf
.......\devide5M.v
.......\db
cardTEL
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