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frame_synchronization

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 432kb
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Introduction - If you have any usage issues, please Google them yourself
Detection of Barker code transmission to achieve frame synchronization
Packet file list
(Preview for download)
帧同步码设计\clkcontr.bsf
............\clkcontr.vhd
............\db\prev_cmp_ycq.asm.qmsg
............\..\prev_cmp_ycq.fit.qmsg
............\..\prev_cmp_ycq.map.qmsg
............\..\prev_cmp_ycq.qmsg
............\..\prev_cmp_ycq.sim.qmsg
............\..\prev_cmp_ycq.tan.qmsg
............\..\prev_cmp_ztb.qmsg
............\..\wed.wsf
............\..\ycq.asm.qmsg
............\..\ycq.asm_labs.ddb
............\..\ycq.cbx.xml
............\..\ycq.cmp.bpm
............\..\ycq.cmp.cdb
............\..\ycq.cmp.ecobp
............\..\ycq.cmp.hdb
............\..\ycq.cmp.logdb
............\..\ycq.cmp.rdb
............\..\ycq.cmp.tdb
............\..\ycq.cmp0.ddb
............\..\ycq.db_info
............\..\ycq.eco.cdb
............\..\ycq.eds_overflow
............\..\ycq.fit.qmsg
............\..\ycq.hier_info
............\..\ycq.hif
............\..\ycq.map.bpm
............\..\ycq.map.cdb
............\..\ycq.map.ecobp
............\..\ycq.map.hdb
............\..\ycq.map.logdb
............\..\ycq.map.qmsg
............\..\ycq.map_bb.cdb
............\..\ycq.map_bb.hdb
............\..\ycq.map_bb.hdbx
............\..\ycq.map_bb.logdb
............\..\ycq.pre_map.cdb
............\..\ycq.pre_map.hdb
............\..\ycq.psp
............\..\ycq.root_partition.cmp.atm
............\..\ycq.root_partition.cmp.dfp
............\..\ycq.root_partition.cmp.hdbx
............\..\ycq.root_partition.cmp.logdb
............\..\ycq.root_partition.cmp.rcf
............\..\ycq.root_partition.map.atm
............\..\ycq.root_partition.map.hdbx
............\..\ycq.root_partition.map.info
............\..\ycq.rtlv.hdb
............\..\ycq.rtlv_sg.cdb
............\..\ycq.rtlv_sg_swap.cdb
............\..\ycq.sgdiff.cdb
............\..\ycq.sgdiff.hdb
............\..\ycq.signalprobe.cdb
............\..\ycq.sim.hdb
............\..\ycq.sim.qmsg
............\..\ycq.sim.rdb
............\..\ycq.sim_ori.vwf
............\..\ycq.sld_design_entry.sci
............\..\ycq.sld_design_entry_dsc.sci
............\..\ycq.syn_hier_info
............\..\ycq.tan.qmsg
............\..\ycq.tis_db_list.ddb
............\..\ycq.tmw_info
............\fengpin32.bsf
............\fengpin5.bsf
............\fenpin32.vhd
............\fenpin5.bsf
............\fenpin5.vhd
............\fenpin5.vhd.bak
............\panjueqi.bsf
............\panjueqi.vhd
............\RS_clk.bsf
............\rs_clk.vhd
............\xuanzeqi.bsf
............\xuanzeqi.vhd
............\xuanzeqi.vhd.bak
............\ycq.asm.rpt
............\ycq.bsf
............\ycq.done
............\ycq.fit.rpt
............\ycq.fit.smsg
............\ycq.fit.summary
............\ycq.flow.rpt
............\ycq.map.rpt
............\ycq.map.summary
............\ycq.pin
............\ycq.pof
............\ycq.qsf
............\ycq.sim.rpt
............\ycq.sof
............\ycq.tan.rpt
............\ycq.tan.summary
............\ycq.vhd
............\yimaqi.bsf
............\yimaqi.vhd
............\ztb.bdf
............\ztb.qpf
............\ztb.qws
............\ztb.vwf
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