Supports 10 microprocessor instructions, including add sub mov mvi jmp jz in out sti lda microinstruction registers support 8 data bus 16-bit address bus

VHDL
....\alu.cmd_log
....\alu.lso
....\alu.ngc
....\alu.ngr
....\alu.prj
....\alu.stx
....\alu.syr
....\alu.vhdl
....\automake.log
....\bitgen.ut
....\clock.cmd_log
....\clock.dhp
....\clock.lso
....\clock.ngc
....\clock.ngr
....\clock.npl
....\clock.prj
....\clock.stx
....\clock.syr
....\clock.vhdl
....\control.cmd_log
....\control.lso
....\control.ngc
....\control.ngr
....\control.prj
....\control.stx
....\control.syr
....\control.vhdl
....\coregen.log
....\coregen.prj
....\cpu.bgn
....\cpu.bit
....\cpu.bld
....\cpu.cmd_log
....\cpu.drc
....\cpu.lso
....\cpu.mrp
....\cpu.nc1
....\cpu.ncd
....\cpu.ngc
....\cpu.ngd
....\cpu.ngm
....\cpu.ngr
....\cpu.pad
....\cpu.pad_txt
....\cpu.par
....\cpu.pcf
....\cpu.placed_ncd_tracker
....\cpu.prj
....\cpu.routed_ncd_tracker
....\cpu.stx
....\cpu.syr
....\cpu.twr
....\cpu.twx
....\cpu.ucf
....\cpu.ucf.untf
....\cpu.ut
....\cpu.vhdl
....\cpu.xpi
....\cpu_last_par.ncd
....\cpu_map.ncd
....\cpu_map.ngm
....\cpu_pad.csv
....\cpu_pad.txt
....\getir.cmd_log
....\getir.lso
....\getir.ngc
....\getir.ngr
....\getir.prj
....\getir.stx
....\getir.syr
....\getir.vhdl
....\pepExtractor.prj
....\results.txt
....\rwrite.cmd_log
....\rwrite.lso
....\rwrite.ngc
....\rwrite.ngr
....\rwrite.prj
....\rwrite.stx
....\rwrite.syr
....\rwrite.vhdl
....\store.cmd_log
....\store.lso
....\store.ngc
....\store.ngr
....\store.prj
....\store.stx
....\store.syr
....\store.vhdl
....\Symth.vhdl
....\talu.ANT
....\talu.fdo
....\talu.tbw
....\talu.udo
....\talu.vhw
....\talu1.ANT
....\talu1.fdo
....\talu1.tbw

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