hi i have uploaded the code

rs_dec_v1_r1\code\chien.vhd
............\....\euclid.vhd
............\....\gfmul.vhd
............\....\gfnorm.vhd
............\....\modelsim.ini
............\....\omcalc.vhd
............\....\rsdec_top.vhd
............\....\rsdec_top_tb.vhd
............\....\rs_enc.vhd
............\....\rs_pkg.vhd
............\....\sram_premul.vhd
............\....\sram_sigma.vhd
............\....\sram_synd.vhd
............\....\sram_word.vhd
............\....\syndcalc.vhd
............\....\tb_ rs_enc.vhd
............\....\transcript
............\....\vsim.wlf
............\....\wordmem.vhd
............\....\...k\chien\rtl.asm
............\....\....\.....\rtl.dat
............\....\....\.....\_primary.dat
............\....\....\euclid\rtl.asm
............\....\....\......\rtl.dat
............\....\....\......\_primary.dat
............\....\....\gfmul\rtl.asm
............\....\....\.....\rtl.dat
............\....\....\.....\_primary.dat
............\....\....\..norm\rtl.asm
............\....\....\......\rtl.dat
............\....\....\......\_primary.dat
............\....\....\omcalc\rtl.asm
............\....\....\......\rtl.dat
............\....\....\......\_primary.dat
............\....\....\rsdec_top\rtl.asm
............\....\....\.........\rtl.dat
............\....\....\.........\_primary.dat
............\....\....\........._tb\behave.asm
............\....\....\............\behave.dat
............\....\....\............\_primary.dat
............\....\....\.._enc\rtl.dat
............\....\....\......\_primary.dat
............\....\....\...pkg\body.asm
............\....\....\......\body.dat
............\....\....\......\_primary.dat
............\....\....\sram_sigma\premul_rom.asm
............\....\....\..........\premul_rom.dat
............\....\....\..........\rtl.asm
............\....\....\..........\rtl.dat
............\....\....\..........\_primary.dat
............\....\....\......ynd\rtl.asm
............\....\....\.........\rtl.dat
............\....\....\.........\_primary.dat
............\....\....\.....word\rtl.asm
............\....\....\.........\rtl.dat
............\....\....\.........\_primary.dat
............\....\....\.yndcalc\rtl.asm
............\....\....\........\rtl.dat
............\....\....\........\_primary.dat
............\....\....\tb_rs_enc\tb.dat
............\....\....\.........\_primary.dat
............\....\....\wordmem\rtl.asm
............\....\....\.......\rtl.dat
............\....\....\.......\_primary.dat
............\....\....\_info
............\code.rar
............\doc\A Fast Reed-Solomon Product-Code Decoder Without Redundant Computations.pdf
............\...\A High Speed Reed-Solomon decoder chip using inversionlessdecomposed architecture for Euclidean algorithm.pdf
............\...\A High-Speed and Low-Latency Reed-Solomon Decoder Based on A Dual-Line Structure.pdf
............\...\A RS Deocding program for correcting both errors and erasures.pdf
............\...\A single Chip VLSI Reed-Solomon Decoder.pdf
............\...\A systolic VLSI Design of a pipeline RS Decoder.pdf
............\...\ACIP_RSFast_DataSheet.pdf
............\...\CA25_2002.pdf
............\...\Cass04.pdf
............\...\decoder.bmp
............\...\doc.rar
............\...\encoder.bmp
............\...\Fill02.pdf
............\...\fkchang_asscc05.pdf
............\...\good_ACIP_RSFast_DataSheet.pdf
............\...\hcchang_apasic02.pdf
............\...\ISCAS2007_RSdec.pdf
............\...\kb9209_e.pdf
............\...\Loan.pdf
............\...\Modeling a Fully Scalable Reed-Solomon Encoder_Decoder over GF(pm) in SystemC.pdf
............\...\otu1_decoder_core.pdf
............\...\p37-51.pdf
............\...\rs.pdf
............\...\RSenc_DS.pdf
............\...\S1110865703309138.pdf
............\...\sal40223d.pdf
............\...\soia04.pdf
............\...\syndromes_itg.pdf
............\...\vtl-rs-v01.pdf
............\...\WIMAX_Reed_Solomon.pdf
............\New Folder\chien.vhd
............\..........\euclid.vhd
............\..........\gfmul.vhd
............\..........\gfnorm.vhd

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