As a simulation tool used MAXPLUS using VHDL language programming, using frequency shift keying modulation method to achieve 3FSK. The input of the system clock frequency respectively 2 hours, 4 minutes and 8 frequency-divider to have these three kinds of frequencies. Through the digital baseband signals received three pairs of binary-coded level value, and use them as three elected a switch to a different frequency values were selected, select a different signal, in order to achieve 3FSK modulation.

3FSK.vhd.doc

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