FPGA using VHDL writing the sub-frequency program, easy to understand. Particularly suitable for beginners.

div1ms\db\div1ms.asm.qmsg
......\..\div1ms.cbx.xml
......\..\div1ms.cmp.cdb
......\..\div1ms.cmp.hdb
......\..\div1ms.cmp.kpt
......\..\div1ms.cmp.logdb
......\..\div1ms.cmp.rdb
......\..\div1ms.cmp.tdb
......\..\div1ms.cmp0.ddb
......\..\div1ms.dbp
......\..\div1ms.db_info
......\..\div1ms.eco.cdb
......\..\div1ms.fit.qmsg
......\..\div1ms.hier_info
......\..\div1ms.hif
......\..\div1ms.map.cdb
......\..\div1ms.map.hdb
......\..\div1ms.map.logdb
......\..\div1ms.map.qmsg
......\..\div1ms.pre_map.cdb
......\..\div1ms.pre_map.hdb
......\..\div1ms.psp
......\..\div1ms.rtlv.hdb
......\..\div1ms.rtlv_sg.cdb
......\..\div1ms.rtlv_sg_swap.cdb
......\..\div1ms.sgdiff.cdb
......\..\div1ms.sgdiff.hdb
......\..\div1ms.signalprobe.cdb
......\..\div1ms.sld_design_entry.sci
......\..\div1ms.sld_design_entry_dsc.sci
......\..\div1ms.syn_hier_info
......\..\div1ms.tan.qmsg
......\div1ms.asm.rpt
......\div1ms.done
......\div1ms.fit.rpt
......\div1ms.fit.smsg
......\div1ms.fit.summary
......\div1ms.flow.rpt
......\div1ms.map.rpt
......\div1ms.map.summary
......\div1ms.pin
......\div1ms.pof
......\div1ms.qpf
......\div1ms.qsf
......\div1ms.qws
......\div1ms.sof
......\div1ms.tan.rpt
......\div1ms.tan.summary
......\div1ms.vhd
......\db
div1ms

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