Use of hardware description language, in the FPGA to implement direct digital frequency synthesis

RAM_DDS\adder.bsf
.......\adder.cmp
.......\adder.qip
.......\adder.vhd
.......\adder1.bsf
.......\adder1.cmp
.......\adder1.qip
.......\adder1.vhd
.......\adder1_wave0.jpg
.......\adder1_waveforms.html
.......\adder_wave0.jpg
.......\adder_waveforms.html
.......\db\add_sub_ucj.tdf
.......\..\altsyncram_i031.tdf
.......\..\mult_add_02c2.tdf
.......\..\mult_add_bbb2.tdf
.......\..\prev_cmp_RAM_DDS.asm.qmsg
.......\..\prev_cmp_RAM_DDS.fit.qmsg
.......\..\prev_cmp_RAM_DDS.map.qmsg
.......\..\prev_cmp_RAM_DDS.qmsg
.......\..\prev_cmp_RAM_DDS.sim.qmsg
.......\..\prev_cmp_RAM_DDS.tan.qmsg
.......\..\RAM_DDS.asm.qmsg
.......\..\RAM_DDS.cbx.xml
.......\..\RAM_DDS.cmp.bpm
.......\..\RAM_DDS.cmp.cdb
.......\..\RAM_DDS.cmp.ecobp
.......\..\RAM_DDS.cmp.hdb
.......\..\RAM_DDS.cmp.logdb
.......\..\RAM_DDS.cmp.rdb
.......\..\RAM_DDS.cmp.tdb
.......\..\RAM_DDS.cmp0.ddb
.......\..\RAM_DDS.db_info
.......\..\RAM_DDS.eco.cdb
.......\..\RAM_DDS.eds_overflow
.......\..\RAM_DDS.fit.qmsg
.......\..\RAM_DDS.fnsim.cdb
.......\..\RAM_DDS.fnsim.hdb
.......\..\RAM_DDS.fnsim.qmsg
.......\..\RAM_DDS.hier_info
.......\..\RAM_DDS.hif
.......\..\RAM_DDS.map.bpm
.......\..\RAM_DDS.map.cdb
.......\..\RAM_DDS.map.ecobp
.......\..\RAM_DDS.map.hdb
.......\..\RAM_DDS.map.logdb
.......\..\RAM_DDS.map.qmsg
.......\..\RAM_DDS.map_bb.cdb
.......\..\RAM_DDS.map_bb.hdb
.......\..\RAM_DDS.map_bb.hdbx
.......\..\RAM_DDS.map_bb.logdb
.......\..\RAM_DDS.pre_map.cdb
.......\..\RAM_DDS.pre_map.hdb
.......\..\RAM_DDS.psp
.......\..\RAM_DDS.root_partition.cmp.atm
.......\..\RAM_DDS.root_partition.cmp.dfp
.......\..\RAM_DDS.root_partition.cmp.hdbx
.......\..\RAM_DDS.root_partition.cmp.logdb
.......\..\RAM_DDS.root_partition.cmp.rcf
.......\..\RAM_DDS.root_partition.map.atm
.......\..\RAM_DDS.root_partition.map.hdbx
.......\..\RAM_DDS.root_partition.map.info
.......\..\RAM_DDS.rtlv.hdb
.......\..\RAM_DDS.rtlv_sg.cdb
.......\..\RAM_DDS.rtlv_sg_swap.cdb
.......\..\RAM_DDS.sgdiff.cdb
.......\..\RAM_DDS.sgdiff.hdb
.......\..\RAM_DDS.signalprobe.cdb
.......\..\RAM_DDS.sim.cvwf
.......\..\RAM_DDS.sim.hdb
.......\..\RAM_DDS.sim.qmsg
.......\..\RAM_DDS.sim.rdb
.......\..\RAM_DDS.simfam
.......\..\RAM_DDS.sld_design_entry.sci
.......\..\RAM_DDS.sld_design_entry_dsc.sci
.......\..\RAM_DDS.syn_hier_info
.......\..\RAM_DDS.tan.qmsg
.......\..\RAM_DDS.tis_db_list.ddb
.......\..\RAM_DDS.tmw_info
.......\..\wed.wsf
.......\mymif.mif
.......\RAM_DDS.asm.rpt
.......\RAM_DDS.bdf
.......\RAM_DDS.done
.......\RAM_DDS.fit.rpt
.......\RAM_DDS.fit.smsg
.......\RAM_DDS.fit.summary
.......\RAM_DDS.flow.rpt
.......\RAM_DDS.map.rpt
.......\RAM_DDS.map.summary
.......\RAM_DDS.pin
.......\RAM_DDS.pof
.......\RAM_DDS.qpf
.......\RAM_DDS.qsf
.......\RAM_DDS.qws
.......\RAM_DDS.sim.rpt
.......\RAM_DDS.sof
.......\RAM_DDS.tan.rpt
.......\RAM_DDS.tan.summary
.......\RAM_DDS.vwf

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