Micro-program controller component experiments, the use of VHDL language use Quartus test, simulation CPU

1.12 微程序控制器部件实验\cmp_state.ini
.........................\CPU.asm.rpt
.........................\CPU.done
.........................\CPU.fit.eqn
.........................\CPU.fit.rpt
.........................\CPU.fit.summary
.........................\CPU.flow.rpt
.........................\CPU.map.eqn
.........................\CPU.map.rpt
.........................\CPU.map.summary
.........................\CPU.pin
.........................\CPU.pof
.........................\CPU.qpf
.........................\CPU.qsf
.........................\CPU.qws
.........................\CPU.tan.rpt
.........................\CPU.tan.summary
.........................\cpu.vhd
.........................\CPU_assignment_defaults.qdf
.........................\cpu_defs.vhd
.........................\cpu_micro.sof
.........................\db\add_sub_4ih.tdf
.........................\..\add_sub_5ih.tdf
.........................\..\CPU.asm.qmsg
.........................\..\CPU.cbx.xml
.........................\..\CPU.cmp.cdb
.........................\..\CPU.cmp.hdb
.........................\..\CPU.cmp.rdb
.........................\..\CPU.cmp.tdb
.........................\..\CPU.cmp0.ddb
.........................\..\CPU.db_info
.........................\..\CPU.eco.cdb
.........................\..\CPU.fit.qmsg
.........................\..\CPU.hier_info
.........................\..\CPU.hif
.........................\..\CPU.map.cdb
.........................\..\CPU.map.hdb
.........................\..\CPU.map.qmsg
.........................\..\CPU.pre_map.cdb
.........................\..\CPU.pre_map.hdb
.........................\..\CPU.psp
.........................\..\CPU.rtlv.hdb
.........................\..\CPU.rtlv_sg.cdb
.........................\..\CPU.rtlv_sg_swap.cdb
.........................\..\CPU.sgdiff.cdb
.........................\..\CPU.sgdiff.hdb
.........................\..\CPU.sld_design_entry.sci
.........................\..\CPU.sld_design_entry_dsc.sci
.........................\..\CPU.syn_hier_info
.........................\..\CPU.tan.qmsg
.........................\..\CPU_cmp.qrpt
.........................\db
1.12 微程序控制器部件实验

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．