Using Verilog HDL language driver LCD12864 timing, can be directly used FPGA/CPLD driver LCD12864 the.

FPGA直接驱动LCD_12864\128X64.hex
.....................\db\altsyncram_fu61.tdf
.....................\..\LCD.db_info
.....................\..\LCD.eco.cdb
.....................\..\LCD.sim.cvwf
.....................\..\LCD.sim_ori.vwf
.....................\..\LCD.sld_design_entry.sci
.....................\..\LCD_global_asgn_op.abo
.....................\..\prev_cmp_LCD.asm.qmsg
.....................\..\prev_cmp_LCD.fit.qmsg
.....................\..\prev_cmp_LCD.map.qmsg
.....................\..\prev_cmp_LCD.qmsg
.....................\..\prev_cmp_LCD.sim.qmsg
.....................\..\prev_cmp_LCD.tan.qmsg
.....................\..\wed.wsf
.....................\fifo.bsf
.....................\fifo.cmp
.....................\fifo.qip
.....................\fifo.v
.....................\fifo_bb.v
.....................\fifo_wave0.jpg
.....................\fifo_wave1.jpg
.....................\fifo_waveforms.html
.....................\incremental_db\compiled_partitions\LCD.root_partition.cmp.atm
.....................\..............\...................\LCD.root_partition.cmp.cdb
.....................\..............\...................\LCD.root_partition.cmp.dfp
.....................\..............\...................\LCD.root_partition.cmp.hdb
.....................\..............\...................\LCD.root_partition.cmp.hdbx
.....................\..............\...................\LCD.root_partition.cmp.kpt
.....................\..............\...................\LCD.root_partition.cmp.logdb
.....................\..............\...................\LCD.root_partition.cmp.rcf
.....................\..............\...................\LCD.root_partition.cmp.rcfdb
.....................\..............\...................\LCD.root_partition.map.atm
.....................\..............\...................\LCD.root_partition.map.cdb
.....................\..............\...................\LCD.root_partition.map.dpi
.....................\..............\...................\LCD.root_partition.map.hdb
.....................\..............\...................\LCD.root_partition.map.hdbx
.....................\..............\...................\LCD.root_partition.map.kpt
.....................\..............\README
.....................\LCD.asm.rpt
.....................\LCD.cdf
.....................\LCD.done
.....................\LCD.dpf
.....................\LCD.fit.rpt
.....................\LCD.fit.smsg
.....................\LCD.fit.summary
.....................\LCD.flow.rpt
.....................\LCD.map.rpt
.....................\LCD.map.smsg
.....................\LCD.map.summary
.....................\LCD.pin
.....................\LCD.pof
.....................\LCD.qpf
.....................\LCD.qsf
.....................\LCD.qws
.....................\LCD.sim.rpt
.....................\LCD.sof
.....................\LCD.tan.rpt
.....................\LCD.tan.summary
.....................\LCD.v
.....................\LCD.v.bak
.....................\LCD.vwf
.....................\LCD_12864.bdf
.....................\LCD_assignment_defaults.qdf
.....................\read_me.txt
.....................\ROM_picture.bsf
.....................\ROM_picture.cmp
.....................\ROM_picture.qip
.....................\ROM_picture.v
.....................\ROM_picture_bb.v
.....................\ROM_picture_wave0.jpg
.....................\ROM_picture_waveforms.html
.....................\Waveform1.vwf
.....................\incremental_db\compiled_partitions
.....................\db
.....................\incremental_db
FPGA直接驱动LCD_12864

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