Description: This source of commonly used benchmark, very popular in China, it is proposed to look at everyone to download, welcomed the support Platform: |
Size: 17113 |
Author:lidayong |
Hits:
Description: The need for everyone to download and more, this is a good source of regulators, the wave of small, stable, and also can bring a lot of load Platform: |
Size: 7475 |
Author:lidayong |
Hits:
Description: FPGA-based design of digital phase-locked loop, a by the differential ahead of/lag type seizure constitutes a digital phase-locked loop phase of the Verilog-HDL modeling program Platform: |
Size: 504598 |
Author:Zoe |
Hits:
Description: An active RFID tag design, the realization of the active RFID tag of the low-cost, long-range, anti-collision, battery-powered, long-life. Platform: |
Size: 28465 |
Author:王成 |
Hits:
Description: Asynchronous FIFO design documentation, as well as the need to pay attention to source code (in the text have). Is a standard asynchronous FIFO, can be integrated. Platform: |
Size: 229070 |
Author:刘强 |
Hits:
Description: Asynchronous FIFO design documentation, as well as the need to pay attention to source code (in the text have). Is a standard asynchronous FIFO, can be integrated. Platform: |
Size: 46520 |
Author:刘强 |
Hits:
Description: Computer information management system, to do with VF, and I hope everyone has the usefulness of Platform: |
Size: 347652 |
Author:wxch |
Hits: