5-stage pipeline MIPS architecture designed to support common integer instructions.

Pipelined MIPS\resource\alu.v
..............\........\alu_dec.v
..............\........\arithmetic_unit.v
..............\........\control_unit.v
..............\........\data_path.v
..............\........\dec.v
..............\........\equal.v
..............\........\full_adder.v
..............\........\hazard_unit.v
..............\........\imm_extension.v
..............\........\instr_reg.v
..............\........\logic_unit.v
..............\........\main_dec.v
..............\........\mux2.v
..............\........\mux3.v
..............\........\pc_adder.v
..............\........\regfile.v
..............\........\reg_.v
..............\........\reg_en.v
..............\simulation\Pipeline MIPS.cr.mti
..............\..........\Pipeline MIPS.mpf
..............\..........\vish_stacktrace.vstf
..............\..........\vsim.wlf
..............\..........\work\alu\verilog.asm
..............\..........\....\...\verilog.rw
..............\..........\....\...\_primary.dat
..............\..........\....\...\_primary.dbs
..............\..........\....\...\_primary.vhd
..............\..........\....\..._dec\verilog.asm
..............\..........\....\.......\verilog.rw
..............\..........\....\.......\_primary.dat
..............\..........\....\.......\_primary.dbs
..............\..........\....\.......\_primary.vhd
..............\..........\....\.rithmetic_unit\verilog.asm
..............\..........\....\...............\verilog.rw
..............\..........\....\...............\_primary.dat
..............\..........\....\...............\_primary.dbs
..............\..........\....\...............\_primary.vhd
..............\..........\....\control_unit\verilog.asm
..............\..........\....\............\verilog.rw
..............\..........\....\............\_primary.dat
..............\..........\....\............\_primary.dbs
..............\..........\....\............\_primary.vhd
..............\..........\....\data_memory\verilog.asm
..............\..........\....\...........\verilog.rw
..............\..........\....\...........\_primary.dat
..............\..........\....\...........\_primary.dbs
..............\..........\....\...........\_primary.vhd
..............\..........\....\.....path\verilog.asm
..............\..........\....\.........\verilog.rw
..............\..........\....\.........\_primary.dat
..............\..........\....\.........\_primary.dbs
..............\..........\....\.........\_primary.vhd
..............\..........\....\.ec\verilog.asm
..............\..........\....\...\verilog.rw
..............\..........\....\...\_primary.dat
..............\..........\....\...\_primary.dbs
..............\..........\....\...\_primary.vhd
..............\..........\....\equal\verilog.asm
..............\..........\....\.....\verilog.rw
..............\..........\....\.....\_primary.dat
..............\..........\....\.....\_primary.dbs
..............\..........\....\.....\_primary.vhd
..............\..........\....\full_adder\verilog.asm
..............\..........\....\..........\verilog.rw
..............\..........\....\..........\_primary.dat
..............\..........\....\..........\_primary.dbs
..............\..........\....\..........\_primary.vhd
..............\..........\....\hazard_unit\verilog.asm
..............\..........\....\...........\verilog.rw
..............\..........\....\...........\_primary.dat
..............\..........\....\...........\_primary.dbs
..............\..........\....\...........\_primary.vhd
..............\..........\....\imm_extension\verilog.asm
..............\..........\....\.............\verilog.rw
..............\..........\....\.............\_primary.dat
..............\..........\....\.............\_primary.dbs
..............\..........\....\.............\_primary.vhd
..............\..........\....\.nstruction_memory\verilog.asm
..............\..........\....\..................\verilog.rw
..............\..........\....\..................\_primary.dat
..............\..........\....\..................\_primary.dbs
..............\..........\....\..................\_primary.vhd
.............

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