This is a serial communication source code, verilog language, using the module combination method.

serial communication source code\uart.qpf
................................\uart.qsf
................................\db\uart.db_info
................................\..\uart.cbx.xml
................................\..\prev_cmp_uart.map.qmsg
................................\..\prev_cmp_uart.qmsg
................................\..\uart.map.qmsg
................................\..\uart.map.hdb
................................\..\uart.cmp.rdb
................................\..\uart.tis_db_list.ddb
................................\..\uart.sld_design_entry.sci
................................\..\uart.eco.cdb
................................\uart.map.summary
................................\speed_select.v.bak
................................\uart_top.v.bak
................................\uart_top.v
................................\speed_select.v
................................\uart_rx.v
................................\uart.map.rpt
................................\uart.flow.rpt
................................\uart.qws
................................\db
serial communication source code

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