Nous nous proposons de construire un système d’acquisition à partir du « SPARTAN 3A FPGA starter kit board » de XILINX et des périphériques de cette carte dans le cadre du TP « acquisition de données » . Le kit comprend un ADC deux voies (LTC1407A de LINEAR TECHNOLOGY) 14 bits associé à un amplificateur à gain programmable (LTC6912 de LINEAR TECHNOLOGY) pour chacune des deux voies de l’ADC. La fréquence d’échantillonnage par voie est au maximum de 1.5 MHz. Les

projet\_xmsgs
......\......\pn_parser.xmsgs
......\Amp_LTC6912_1.vhd
......\Amp_LTC6912_1_isim_beh.exe
......\Amp_LTC6912_1_stx_beh.prj
......\Banc_Test.vhd
......\Bascule_D.vhd
......\fr俼uence d'horloge.txt
......\fuse.log
......\fuse.xmsgs
......\fuseRelaunch.cmd
......\iseconfig
......\.........\alrifai_V1.projectmgr
......\.........\proget_V1.projectmgr
......\.........\testbench.xreport
......\isim.cmd
......\isim.log
......\isim
......\....\isim_usage_statistics.html
......\....\pn_info
......\....\precompiled.exe.sim
......\....\...................\ieee
......\....\...................\....\p_1242562249.c
......\....\...................\....\p_1242562249.didat
......\....\...................\....\p_1242562249.nt.obj
......\....\...................\....\p_2592010699.c
......\....\...................\....\p_2592010699.didat
......\....\...................\....\p_2592010699.nt.obj
......\....\temp
......\....\....\amp_ltc6912_1.vdb
......\....\....\amp_ltc6912_1_cfg.vdb
......\....\....\bascule_d.vdb
......\....\....\bascule_d_cfg.vdb
......\....\....\my_package.vdb
......\....\....\testbench.vdb
......\....\testbench_isim_beh.exe.sim
......\....\..........................\isimcrash.log
......\....\..........................\ISimEngine-DesignHierarchy.dbg
......\....\..........................\isimkernel.log
......\....\..........................\netId.dat
......\....\..........................\testbench_isim_beh.exe
......\....\..........................\tmp_save
......\....\..........................\........\_1
......\....\..........................\work
......\....\..........................\....\a_1463710724_0515606320.c
......\....\..........................\....\a_1463710724_0515606320.didat
......\....\..........................\....\a_1463710724_0515606320.nt.obj
......\....\..........................\....\a_1949178628_2372691052.c
......\....\..........................\....\a_1949178628_2372691052.didat
......\....\..........................\....\a_1949178628_2372691052.nt.obj
......\....\..........................\....\a_2405607968_1763303644.c
......\....\..........................\....\a_2405607968_1763303644.didat
......\....\..........................\....\a_2405607968_1763303644.nt.obj
......\....\..........................\....\p_2688103174.c
......\....\..........................\....\p_2688103174.didat
......\....\..........................\....\p_2688103174.nt.obj
......\....\..........................\....\testbench_isim_beh.exe_main.c
......\....\..........................\....\testbench_isim_beh.exe_main.nt.obj
......\....\work
......\....\....\amp_ltc6912_1.vdb
......\....\....\amp_ltc6912_1_cfg.vdb
......\....\....\bascule_d.vdb
......\....\....\bascule_d_cfg.vdb
......\....\....\my_package.vdb
......\....\....\testbench.vdb
......\My_Package.vhd
......\proget_V1.gise
......\proget_V1.xise
......\projet.gise
......\test_banch.ucf
......\testbench_beh.prj
......\testbench_isim_beh.exe
......\testbench_isim_beh.wdb
......\testbench_stx_beh.prj
......\testbench_summary.html
......\xilinxsim.ini

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