68013 and FPGA communication, including firmware and verilog program

固件+Verlilog\Firmware\build.bat
.............\........\bulkloop
.............\........\bulkloop.c
.............\........\bulkloop.hex
.............\........\bulkloop.iic
.............\........\bulkloop.lnp
.............\........\bulkloop.LST
.............\........\bulkloop.M51
.............\........\bulkloop.OBJ
.............\........\bulkloop.Opt
.............\........\bulkloop.plg
.............\........\dscr.a51
.............\........\dscr.LST
.............\........\dscr.OBJ
.............\........\EZUSB.LIB
.............\........\fw.c
.............\........\fw.LST
.............\........\fw.OBJ
.............\........\Fx2.h
.............\........\fx2regs.h
.............\........\fx2regs.inc
.............\........\fx2sdly.h
.............\........\readme.txt
.............\........\slave_fifo_test.opt.bak
.............\........\slave_fifo_test.Uv2.bak
.............\........\slave_fifo_test.uvgui.kin
.............\........\slave_fifo_test.uvgui_kin.bak
.............\........\slave_fifo_test.uvopt
.............\........\slave_fifo_test.uvproj
.............\........\slave_fifo_test_Opt.Bak
.............\........\slave_fifo_test_uvopt.bak
.............\........\slave_fifo_test_uvproj.bak
.............\........\syncdly.h
.............\........\USBJmpTb.a51
.............\........\USBJmpTb.OBJ
.............\module_of_usb.v
.............\Firmware
固件+Verlilog

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