Based on Altera Cyclone II 2C35 chips and SDRAM chips IS42S16400. the code realize a the sdram controller (for teaching)

SDRAM_CONTROL_DE2_fifo
......................\aaa
......................\db
......................\..\altsyncram_0hq1.tdf
......................\..\altsyncram_0ls3.tdf
......................\..\altsyncram_4ls3.tdf
......................\..\altsyncram_8hq1.tdf
......................\..\altsyncram_cls3.tdf
......................\..\altsyncram_irg1.tdf
......................\..\altsyncram_lve1.tdf
......................\..\altsyncram_m2c1.tdf
......................\..\altsyncram_ogq1.tdf
......................\..\altsyncram_p6a1.tdf
......................\..\altsyncram_sgq1.tdf
......................\..\altsyncram_sks3.tdf
......................\..\alt_synch_pipe_0e8.tdf
......................\..\alt_synch_pipe_1e8.tdf
......................\..\alt_synch_pipe_2e8.tdf
......................\..\alt_synch_pipe_rdb.tdf
......................\..\alt_synch_pipe_sdb.tdf
......................\..\alt_synch_pipe_tdb.tdf
......................\..\alt_synch_pipe_udb.tdf
......................\..\alt_synch_pipe_vd8.tdf
......................\..\a_gray2bin_kdb.tdf
......................\..\a_graycounter_egc.tdf
......................\..\a_graycounter_fgc.tdf
......................\..\a_graycounter_o96.tdf
......................\..\cmpr_536.tdf
......................\..\cmpr_5cc.tdf
......................\..\cmpr_9cc.tdf
......................\..\cmpr_acc.tdf
......................\..\cmpr_bcc.tdf
......................\..\cntr_0ci.tdf
......................\..\cntr_2ci.tdf
......................\..\cntr_7ci.tdf
......................\..\cntr_gui.tdf
......................\..\cntr_sbi.tdf
......................\..\cntr_u4j.tdf
......................\..\cntr_ubi.tdf
......................\..\dcfifo_4mk1.tdf
......................\..\dcfifo_8fp1.tdf
......................\..\dcfifo_nmk1.tdf
......................\..\dcfifo_rfp1.tdf
......................\..\decode_rqf.tdf
......................\..\dffpipe_0f9.tdf
......................\..\dffpipe_kec.tdf
......................\..\dffpipe_ngh.tdf
......................\..\dffpipe_oe9.tdf
......................\..\dffpipe_pe9.tdf
......................\..\dffpipe_qe9.tdf
......................\..\dffpipe_re9.tdf
......................\..\dffpipe_se9.tdf
......................\..\dffpipe_te9.tdf
......................\..\dffpipe_ue9.tdf
......................\..\dffpipe_ve9.tdf
......................\..\mux_9oc.tdf
......................\..\prev_cmp_SDRAM_CONTROL.archive.qmsg
......................\..\prev_cmp_SDRAM_CONTROL.asm.qmsg
......................\..\prev_cmp_SDRAM_CONTROL.fit.qmsg
......................\..\prev_cmp_SDRAM_CONTROL.map.qmsg
......................\..\prev_cmp_SDRAM_CONTROL.qmsg
......................\..\prev_cmp_SDRAM_CONTROL.tan.qmsg
......................\..\SDRAM_CONTROL.archive.qmsg
......................\..\SDRAM_CONTROL.asm.qmsg
......................\..\SDRAM_CONTROL.asm_labs.ddb
......................\..\SDRAM_CONTROL.cbx.xml
......................\..\SDRAM_CONTROL.cmp.cdb
......................\..\SDRAM_CONTROL.cmp.hdb
......................\..\SDRAM_CONTROL.cmp.kpt
......................\..\SDRAM_CONTROL.cmp.logdb
......................\..\SDRAM_CONTROL.cmp.rdb
......................\..\SDRAM_CONTROL.cmp.tdb
......................\..\SDRAM_CONTROL.cmp0.ddb
......................\..\SDRAM_CONTROL.db_info
......................\..\SDRAM_CONTROL.eco.cdb
......................\..\SDRAM_CONTROL.fit.qmsg
......................\..\SDRAM_CONTROL.hier_info
......................\..\SDRAM_CONTROL.hif
......................\..\SDRAM_CONTROL.lpc.html
......................\..\SDRAM_CONTROL.lpc.rdb
......................\..\SDRAM_CONTROL.lpc.txt
......................\..\SDRAM_CONTROL.map.cdb
......................\..\SDRAM_CONTROL.map.hdb
......................\..\SDRAM_CONTROL.map.logdb
......................\..\SDRAM_CONTROL.map.qmsg
......................\..\SDRAM_CONTROL.pre_map.cdb
......................\..\SDRAM_CONTROL.pre_map.hdb
......................\..\SDRAM_CONTROL.rpp.qmsg
......................\..\SDRAM_CONTROL.rtlv.hdb
......................\..\SDRAM_CON

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