Convert verilog language write state machine multiple states

zhuangtaiji\db\logic_util_heursitic.dat
...........\..\prev_cmp_zhuangtaiji.qmsg
...........\..\zhuangtaiji.amm.cdb
...........\..\zhuangtaiji.asm.qmsg
...........\..\zhuangtaiji.asm.rdb
...........\..\zhuangtaiji.asm_labs.ddb
...........\..\zhuangtaiji.cbx.xml
...........\..\zhuangtaiji.cmp.bpm
...........\..\zhuangtaiji.cmp.cdb
...........\..\zhuangtaiji.cmp.hdb
...........\..\zhuangtaiji.cmp.kpt
...........\..\zhuangtaiji.cmp.logdb
...........\..\zhuangtaiji.cmp.rdb
...........\..\zhuangtaiji.cmp0.ddb
...........\..\zhuangtaiji.cmp1.ddb
...........\..\zhuangtaiji.cmp_merge.kpt
...........\..\zhuangtaiji.db_info
...........\..\zhuangtaiji.eda.qmsg
...........\..\zhuangtaiji.fit.qmsg
...........\..\zhuangtaiji.hier_info
...........\..\zhuangtaiji.hif
...........\..\zhuangtaiji.idb.cdb
...........\..\zhuangtaiji.lpc.html
...........\..\zhuangtaiji.lpc.rdb
...........\..\zhuangtaiji.lpc.txt
...........\..\zhuangtaiji.map.bpm
...........\..\zhuangtaiji.map.cdb
...........\..\zhuangtaiji.map.hdb
...........\..\zhuangtaiji.map.kpt
...........\..\zhuangtaiji.map.logdb
...........\..\zhuangtaiji.map.qmsg
...........\..\zhuangtaiji.map_bb.cdb
...........\..\zhuangtaiji.map_bb.hdb
...........\..\zhuangtaiji.map_bb.logdb
...........\..\zhuangtaiji.pre_map.cdb
...........\..\zhuangtaiji.pre_map.hdb
...........\..\zhuangtaiji.rtlv.hdb
...........\..\zhuangtaiji.rtlv_sg.cdb
...........\..\zhuangtaiji.rtlv_sg_swap.cdb
...........\..\zhuangtaiji.sgdiff.cdb
...........\..\zhuangtaiji.sgdiff.hdb
...........\..\zhuangtaiji.sld_design_entry.sci
...........\..\zhuangtaiji.sld_design_entry_dsc.sci
...........\..\zhuangtaiji.smart_action.txt
...........\..\zhuangtaiji.smp_dump.txt
...........\..\zhuangtaiji.sta.qmsg
...........\..\zhuangtaiji.sta.rdb
...........\..\zhuangtaiji.sta_cmp.6_slow.tdb
...........\..\zhuangtaiji.syn_hier_info
...........\..\zhuangtaiji.tis_db_list.ddb
...........\..\zhuangtaiji.tmw_info
...........\incremental_db\compiled_partitions\zhuangtaiji.db_info
...........\..............\...................\zhuangtaiji.root_partition.cmp.cdb
...........\..............\...................\zhuangtaiji.root_partition.cmp.dfp
...........\..............\...................\zhuangtaiji.root_partition.cmp.hdb
...........\..............\...................\zhuangtaiji.root_partition.cmp.kpt
...........\..............\...................\zhuangtaiji.root_partition.cmp.logdb
...........\..............\...................\zhuangtaiji.root_partition.cmp.rcfdb
...........\..............\...................\zhuangtaiji.root_partition.map.cdb
...........\..............\...................\zhuangtaiji.root_partition.map.dpi
...........\..............\...................\zhuangtaiji.root_partition.map.hbdb.cdb
...........\..............\...................\zhuangtaiji.root_partition.map.hbdb.hb_info
...........\..............\...................\zhuangtaiji.root_partition.map.hbdb.hdb
...........\..............\...................\zhuangtaiji.root_partition.map.hbdb.sig
...........\..............\...................\zhuangtaiji.root_partition.map.hdb
...........\..............\...................\zhuangtaiji.root_partition.map.kpt
...........\..............\README
...........\simulation\modelsim\modelsim.ini
...........\..........\........\msim_transcript
...........\..........\........\rtl_work\zhuangtaiji\verilog.prw
...........\..........\........\........\...........\verilog.psm
...........\..........\........\........\...........\_primary.dat
...........\..........\........\........\...........\_primary.dbs
...........\..........\........\........\...........\_primary.vhd
...........\..........\........\........\..........._tb\verilog.prw
...........\..........\........\........\..............\verilog.psm
...........\..........\........\........\..............\_primary.dat
...........\..........\........\........\..............\_primary.dbs
...........\..........\........\........\..............\_primary.vhd
...........\..........\........\........\_info
...........\..........\........\........\_vmake
...........\..........\.......

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