This about the audio side of SOPC design, the source code is the hardware and software co-design, including verilog and C language design two parts, verification, you can.

DE2_70_AUDIO\.metadata\.lock
............\.........\.log
............\.........\.plugins\com.altera.nj.ui\dialog_settings.xml
............\.........\........\org.eclipse.cdt.core\.log
............\.........\........\....................\production_tool.1185779584921.pdom
............\.........\........\....................\production_tool_syslib.1185779573796.pdom
............\.........\........\................make.core\.log
............\.........\........\.........................\production_tool.sc
............\.........\........\.........................\production_tool_syslib.sc
............\.........\........\.........................\specs.c
............\.........\........\.........................\specs.cpp
............\.........\........\.....................ui\dialog_settings.xml
............\.........\........\................ui\dialog_settings.xml
............\.........\........\.............ore.resources\.projects\production_tool\.indexes\properties.index
............\.........\........\..........................\.........\...............\.markers
............\.........\........\..........................\.........\..............._syslib\.indexes\properties.index
............\.........\........\..........................\.root\.indexes\history.version
............\.........\........\..........................\.....\........\properties.index
............\.........\........\..........................\.....\........\properties.version
............\.........\........\..........................\.....\6.tree
............\.........\........\..........................\.safetable\org.eclipse.core.resources
............\.........\........\..................untime\.settings\org.eclipse.cdt.debug.core.prefs
............\.........\........\........................\.........\org.eclipse.cdt.managedbuilder.core.prefs
............\.........\........\........................\.........\org.eclipse.cdt.ui.prefs
............\.........\........\........................\.........\org.eclipse.core.resources.prefs
............\.........\........\........................\.........\org.eclipse.search.prefs
............\.........\........\........................\.........\org.eclipse.ui.editors.prefs
............\.........\........\........................\.........\org.eclipse.ui.ide.prefs
............\.........\........\........................\.........\org.eclipse.ui.prefs
............\.........\........\............debug.core\.launches\production_tool Nios II HW configuration.launch
............\.........\........\..................ui\dialog_settings.xml
............\.........\........\....................\launchConfigurationHistory.xml
............\.........\........\............ltk.ui.refactoring\dialog_settings.xml
............\.........\........\............search\dialog_settings.xml
............\.........\........\............ui.ide\dialog_settings.xml
............\.........\........\...............workbench\dialog_settings.xml
............\.........\........\........................\workbench.xml
............\.........\........\.........................texteditor\dialog_settings.xml
............\.........\version.ini
............\.sopc_builder\install.ptf
............\.............\install2.ptf
............\.............\preferences.xml
............\altpllpll.ppf
............\altpllpll.v
............\altpllpll_sopc.ppf
............\altpllpll_sopc.v
............\audio.v
............\audio_pll.bsf
............\audio_pll.ppf
............\audio_pll.v
............\audio_pll_bb.v
............\audio_pll_wave0.jpg
............\audio_pll_waveforms.html
............\auido_dac_fifo_wave0.jpg
............\auido_dac_fifo_wave1.jpg
............\auido_dac_fifo_waveforms.html
............\Chain1.cdf
............\CLK_DIV.v
............\clock_0.v
............\clock_1.v
............\cpu.ocp
............\cpu.v
............\cpu_bht_ram.mif
............\cpu_dc_tag_ram.mif
............\cpu_ic_tag_ram.mif
............\cpu_jtag_debug_module.v
............\cpu_jtag_debug_module_wrapper.v
............\cpu_mult_cell.v
............\cpu_ociram_defa

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