FPGA-based development board routines, using verilog language, has been tested and is very easy to use

01_basic\comp\comp.asm.rpt
........\....\comp.cdf
........\....\comp.done
........\....\comp.fit.rpt
........\....\comp.fit.smsg
........\....\comp.fit.summary
........\....\comp.flow.rpt
........\....\comp.map.rpt
........\....\comp.map.summary
........\....\comp.pin
........\....\comp.pof
........\....\comp.qpf
........\....\comp.qsf
........\....\comp.qws
........\....\comp.sof
........\....\comp.sta.rpt
........\....\comp.sta.summary
........\....\comp.tan.rpt
........\....\comp.tan.summary
........\....\comp.v
........\....\comp.v.bak
........\....\comp_assignment_defaults.qdf
........\....\db\comp.amm.cdb
........\....\..\comp.asm.qmsg
........\....\..\comp.asm.rdb
........\....\..\comp.asm_labs.ddb
........\....\..\comp.cbx.xml
........\....\..\comp.cmp.bpm
........\....\..\comp.cmp.cdb
........\....\..\comp.cmp.hdb
........\....\..\comp.cmp.kpt
........\....\..\comp.cmp.logdb
........\....\..\comp.cmp.rdb
........\....\..\comp.cmp0.ddb
........\....\..\comp.cmp1.ddb
........\....\..\comp.cmp2.ddb
........\....\..\comp.cmp_merge.kpt
........\....\..\comp.db_info
........\....\..\comp.fit.qmsg
........\....\..\comp.hier_info
........\....\..\comp.hif
........\....\..\comp.idb.cdb
........\....\..\comp.lpc.html
........\....\..\comp.lpc.rdb
........\....\..\comp.lpc.txt
........\....\..\comp.map.bpm
........\....\..\comp.map.cdb
........\....\..\comp.map.hdb
........\....\..\comp.map.kpt
........\....\..\comp.map.logdb
........\....\..\comp.map.qmsg
........\....\..\comp.map_bb.cdb
........\....\..\comp.map_bb.hdb
........\....\..\comp.map_bb.logdb
........\....\..\comp.pre_map.cdb
........\....\..\comp.pre_map.hdb
........\....\..\comp.rpp.qmsg
........\....\..\comp.rtlv.hdb
........\....\..\comp.rtlv_sg.cdb
........\....\..\comp.rtlv_sg_swap.cdb
........\....\..\comp.sgate.rvd
........\....\..\comp.sgate_sm.rvd
........\....\..\comp.sgdiff.cdb
........\....\..\comp.sgdiff.hdb
........\....\..\comp.sld_design_entry.sci
........\....\..\comp.sld_design_entry_dsc.sci
........\....\..\comp.smart_action.txt
........\....\..\comp.sta.qmsg
........\....\..\comp.sta.rdb
........\....\..\comp.sta_cmp.8_slow.tdb
........\....\..\comp.syn_hier_info
........\....\..\comp.tis_db_list.ddb
........\....\..\comp.tmw_info
........\....\..\logic_util_heursitic.dat
........\....\..\prev_cmp_comp.asm.qmsg
........\....\..\prev_cmp_comp.fit.qmsg
........\....\..\prev_cmp_comp.map.qmsg
........\....\..\prev_cmp_comp.qmsg
........\....\..\prev_cmp_comp.tan.qmsg
........\....\incremental_db\compiled_partitions\comp.db_info
........\....\..............\...................\comp.root_partition.cmp.cdb
........\....\..............\...................\comp.root_partition.cmp.dfp
........\....\..............\...................\comp.root_partition.cmp.hdb
........\....\..............\...................\comp.root_partition.cmp.kpt
........\....\..............\...................\comp.root_partition.cmp.logdb
........\....\..............\...................\comp.root_partition.cmp.rcfdb
........\....\..............\...................\comp.root_partition.map.cdb
........\....\..............\...................\comp.root_partition.map.dpi
........\....\..............\...................\comp.root_partition.map.hbdb.cdb
........\....\..............\...................\comp.root_partition.map.hbdb.hb_info
........\....\..............\...................\comp.root_partition.map.hbdb.hdb
........\....\..............\...................\comp.root_partition.map.hbdb.sig
........\....\..............\...................\comp.root_partition.map.hdb
........\....\..............\...................\comp.root_partition.map.kpt
........\....\..............\README
........\full_adder\db\full_adder.db_info
........\..........\..\full_adder.sld_design_entry.sci
........\..........\..\logic_util_heursitic.dat
........\..........\..\prev_cmp_full_adder.qmsg
........\..........\full_adder.asm.rpt

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