mutibit flipflop for combining 50ff s in a single clock

final_vhdlcode
..............\1bitffoutput.png
..............\1BITFF_MS.vhd
..............\2bitffoutput.jpg
..............\2BITFF_SINGLE_MS.vhd
..............\50bitffoutput.jpg
..............\50FFS_SINGLE_CLOCK.vhd
..............\comtable.vhd
..............\DATA_Memory.vhd
..............\FF1_master.vhd
..............\FF1_slave.vhd
..............\FF2_master.vhd
..............\FF2_slave.vhd
..............\INVERT_logic.vhd
..............\memory_count.jpg
final_vhdlcode.zip
multibitff_vhd
..............\1BITFF_MS.vhd
..............\2BITFF_SINGLE_MS.vhd
..............\50FFS_SINGLE_CLOCK.vhd
..............\comtable.vhd
..............\DATA_Memory.vhd
..............\FF1_master.vhd
..............\FF1_slave.vhd
..............\FF2_master.vhd
..............\FF2_slave.vhd
..............\INVERT_logic.vhd
..............\XOR_Logic.vhd

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