In ise development environment, establish a hierarchy of top-level modules and sub-modules, and its function is to achieve a resettable class resumes proposal to suspend the stopwatch

FPGA_310_B_源码\sen_cnt\.lso
...............\.......\counter.cmd_log
...............\.......\counter.prj
...............\.......\counter.spl
...............\.......\counter.stx
...............\.......\counter.sym
...............\.......\counter.tfi
...............\.......\counter.v
...............\.......\counter.xst
...............\.......\display.cmd_log
...............\.......\display.spl
...............\.......\display.sym
...............\.......\display.tfi
...............\.......\display.v
...............\.......\ipcore_dir\coregen.cgp
...............\.......\..........\coregen.log
...............\.......\..........\create_ram.tcl
...............\.......\..........\edit_ram.tcl
...............\.......\..........\ram\blk_mem_gen_v7_3_readme.txt
...............\.......\..........\...\doc\blk_mem_gen_v7_3_vinfo.html
...............\.......\..........\...\...\pg058-blk-mem-gen.pdf
...............\.......\..........\...\example_design\ram_exdes.ucf
...............\.......\..........\...\..............\ram_exdes.vhd
...............\.......\..........\...\..............\ram_exdes.xdc
...............\.......\..........\...\..............\ram_prod.vhd
...............\.......\..........\...\implement\implement.bat
...............\.......\..........\...\.........\implement.sh
...............\.......\..........\...\.........\planAhead_ise.bat
...............\.......\..........\...\.........\planAhead_ise.sh
...............\.......\..........\...\.........\planAhead_ise.tcl
...............\.......\..........\...\.........\xst.prj
...............\.......\..........\...\.........\xst.scr
...............\.......\..........\...\simulation\addr_gen.vhd
...............\.......\..........\...\..........\bmg_stim_gen.vhd
...............\.......\..........\...\..........\bmg_tb_pkg.vhd
...............\.......\..........\...\..........\checker.vhd
...............\.......\..........\...\..........\data_gen.vhd
...............\.......\..........\...\..........\functional\simcmds.tcl
...............\.......\..........\...\..........\..........\simulate_isim.bat
...............\.......\..........\...\..........\..........\simulate_mti.bat
...............\.......\..........\...\..........\..........\simulate_mti.do
...............\.......\..........\...\..........\..........\simulate_mti.sh
...............\.......\..........\...\..........\..........\simulate_ncsim.sh
...............\.......\..........\...\..........\..........\simulate_vcs.sh
...............\.......\..........\...\..........\..........\ucli_commands.key
...............\.......\..........\...\..........\..........\vcs_session.tcl
...............\.......\..........\...\..........\..........\wave_mti.do
...............\.......\..........\...\..........\..........\wave_ncsim.sv
...............\.......\..........\...\..........\ram_synth.vhd
...............\.......\..........\...\..........\ram_tb.vhd
...............\.......\..........\...\..........\random.vhd
...............\.......\..........\...\..........\timing\simcmds.tcl
...............\.......\..........\...\..........\......\simulate_isim.bat
...............\.......\..........\...\..........\......\simulate_mti.bat
...............\.......\..........\...\..........\......\simulate_mti.do
...............\.......\..........\...\..........\......\simulate_mti.sh
...............\.......\..........\...\..........\......\simulate_ncsim.sh
...............\.......\..........\...\..........\......\simulate_vcs.sh
...............\.......\..........\...\..........\......\ucli_commands.key
...............\.......\..........\...\..........\......\vcs_session.tcl
...............\.......\..........\...\..........\......\wave_mti.do
...............\.......\..........\...\..........\......\wave_ncsim.sv
...............\.......\..........\ram.asy
...............\.......\..........\ram.gise
...............\.......\..........\ram.ncf
...............\.......\..........\ram.ngc
...............\.......\..........\ram.sym
...............\.......\..........\ram.v
...............\.......\..........\ram.veo
...............\.......\..........\r

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