This file is experimental code programmable logic devices, including vhdl and verilog language, suitable for beginners, simple, easy to understand

2013可编程逻辑器件研究生实验\EDA实验注意事项.pptx
............................\设计实验.doc
............................\课程实验\实验一移位寄存器设计.doc
............................\........\实验三停车场计数器设计.doc
............................\........\实验二伪随机序列发生器设计.doc
............................\........\实验五交通灯控制器设计.doc
............................\........\实验四饮料机控制电路设计.doc
............................\课程实验
2013可编程逻辑器件研究生实验

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