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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-11-13
  • Size : 10.36mb
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  • Author :金****
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Introduction - If you have any usage issues, please Google them yourself
Fifo FPGA-based emulation routines and test files.
Packet file list
(Preview for download)


fifo
....\core
....\dev
....\doc
....\sim
....\src
....\...\220model.v
....\...\altera_mf.v
....\...\db
....\...\..\fifo.cbx.xml
....\...\..\fifo.cmp.rdb
....\...\..\fifo.db_info
....\...\..\fifo.hier_info
....\...\..\fifo.hif
....\...\..\fifo.ipinfo
....\...\..\fifo.lpc.html
....\...\..\fifo.lpc.rdb
....\...\..\fifo.lpc.txt
....\...\..\fifo.map.qmsg
....\...\..\fifo.map.rdb
....\...\..\fifo.map_bb.hdb
....\...\..\fifo.pre_map.hdb
....\...\..\fifo.pti_db_list.ddb
....\...\..\fifo.rtlv.hdb
....\...\..\fifo.rtlv_sg.cdb
....\...\..\fifo.rtlv_sg_swap.cdb
....\...\..\fifo.sld_design_entry.sci
....\...\..\fifo.sld_design_entry_dsc.sci
....\...\..\fifo.smart_action.txt
....\...\..\fifo.tis_db_list.ddb
....\...\..\logic_util_heursitic.dat
....\...\..\mypll_altpll.v
....\...\..\prev_cmp_fifo.qmsg
....\...\fifo.cr.mti
....\...\fifo.mpf
....\...\fifo.qpf
....\...\fifo.qsf
....\...\fifo.qws
....\...\fifo_nativelink_simulation.rpt
....\...\fifo_tb.v
....\...\fifo_tb.v.bak
....\...\greybox_tmp
....\...\...........\cbx_args.txt
....\...\incremental_db
....\...\..............\README
....\...\..............\compiled_partitions
....\...\..............\...................\fifo.db_info
....\...\..............\...................\fifo.root_partition.map.dpi.tmp
....\...\modelsim.ini
....\...\myfifo.qip
....\...\myfifo.v
....\...\mypll.ppf
....\...\mypll.qip
....\...\mypll.v
....\...\mypll_inst.v
....\...\mypll_tb.v
....\...\mypll_tb.v.bak
....\...\output_files
....\...\............\fifo.flow.rpt
....\...\............\fifo.map.rpt
....\...\............\fifo.map.summary
....\...\pll_tb.cr.mti
....\...\pll_tb.mpf
....\...\vsim.wlf
....\...\wlft6yjavg
....\...\wlftyxbcxt
....\...\work
....\...\....\@a@l@t@e@r@a_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s
....\...\....\..........................................\_primary.dat
....\...\....\..........................................\_primary.dbs
....\...\....\..........................................\_primary.vhd
....\...\....\..........................................\verilog.prw
....\...\....\..........................................\verilog.psm
....\...\....\@a@l@t@e@r@a_@m@f_@h@i@n@t_@e@v@a@l@u@a@t@i@o@n
....\...\....\...............................................\_primary.dat
....\...\....\...............................................\_primary.dbs
....\...\....\...............................................\_primary.vhd
....\...\....\...............................................\verilog.prw
....\...\....\...............................................\verilog.psm
....\...\....\@a@l@t@e@r@a_@m@f_@m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n
....\...\....\...........................................................\_primary.dat
....\...\....\...........................................................\_primary.dbs
....\...\....\...........................................................\_primary.vhd
....\...\....\...........................................................\verilog.prw
....\...\....\...........................................................\verilog.psm
....\...\....\@l@p@m_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s
....\...\....\....................................\_primary.dat
....\...\....\....................................\_primary.dbs
....\...\....\....................................\_primary.vhd
....\...\....\....................................\verilog.prw
....\...\....\....................................\verilog.psm
....\...\....\@l@p@m_@h@i@n@t_@e@v@a@l@u@a@t@i@o@n
....\...\....\....................................\_primary.dat
....\...\....\....................................\_primary.dbs
....\...\....\....................................\_primary.vhd
....\...\....\....................................\verilog.prw
....\...\....\....................................\verilog.psm
....\...\....\@l@p@m_@m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n
....\...\....\................................................\_primary.dat
....\...\....\................................................\_primary.dbs
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