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  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-11-14
  • Size : 4.3mb
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  • Author :舒****
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stack\db\altsyncram_kqg1.tdf
.....\..\logic_util_heursitic.dat
.....\..\stack.asm.qmsg
.....\..\stack.asm.rdb
.....\..\stack.asm_labs.ddb
.....\..\stack.cbx.xml
.....\..\stack.cmp.bpm
.....\..\stack.cmp.cdb
.....\..\stack.cmp.hdb
.....\..\stack.cmp.idb
.....\..\stack.cmp.kpt
.....\..\stack.cmp.logdb
.....\..\stack.cmp.rdb
.....\..\stack.cmp_merge.kpt
.....\..\stack.db_info
.....\..\stack.fit.qmsg
.....\..\stack.hier_info
.....\..\stack.hif
.....\..\stack.ipinfo
.....\..\stack.lpc.html
.....\..\stack.lpc.rdb
.....\..\stack.lpc.txt
.....\..\stack.map.ammdb
.....\..\stack.map.bpm
.....\..\stack.map.cdb
.....\..\stack.map.hdb
.....\..\stack.map.kpt
.....\..\stack.map.logdb
.....\..\stack.map.qmsg
.....\..\stack.map.rdb
.....\..\stack.map_bb.cdb
.....\..\stack.map_bb.hdb
.....\..\stack.map_bb.logdb
.....\..\stack.pre_map.hdb
.....\..\stack.pti_db_list.ddb
.....\..\stack.root_partition.map.reg_db.cdb
.....\..\stack.routing.rdb
.....\..\stack.rtlv.hdb
.....\..\stack.rtlv_sg.cdb
.....\..\stack.rtlv_sg_swap.cdb
.....\..\stack.sgdiff.cdb
.....\..\stack.sgdiff.hdb
.....\..\stack.sld_design_entry.sci
.....\..\stack.sld_design_entry_dsc.sci
.....\..\stack.smart_action.txt
.....\..\stack.sta.qmsg
.....\..\stack.sta.rdb
.....\..\stack.sta_cmp.6_slow_1200mv_85c.tdb
.....\..\stack.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
.....\..\stack.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
.....\..\stack.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
.....\..\stack.syn_hier_info
.....\..\stack.tiscmp.fast_1200mv_0c.ddb
.....\..\stack.tiscmp.slow_1200mv_0c.ddb
.....\..\stack.tiscmp.slow_1200mv_85c.ddb
.....\..\stack.tis_db_list.ddb
.....\..\stack.tmw_info
.....\..\stack.vpr.ammdb
.....\incremental_db\compiled_partitions\stack.db_info
.....\..............\...................\stack.root_partition.cmp.ammdb
.....\..............\...................\stack.root_partition.cmp.cdb
.....\..............\...................\stack.root_partition.cmp.dfp
.....\..............\...................\stack.root_partition.cmp.hdb
.....\..............\...................\stack.root_partition.cmp.kpt
.....\..............\...................\stack.root_partition.cmp.logdb
.....\..............\...................\stack.root_partition.cmp.rcfdb
.....\..............\...................\stack.root_partition.map.cdb
.....\..............\...................\stack.root_partition.map.dpi
.....\..............\...................\stack.root_partition.map.hbdb.cdb
.....\..............\...................\stack.root_partition.map.hbdb.hb_info
.....\..............\...................\stack.root_partition.map.hbdb.hdb
.....\..............\...................\stack.root_partition.map.hbdb.sig
.....\..............\...................\stack.root_partition.map.hdb
.....\..............\...................\stack.root_partition.map.kpt
.....\..............\README
.....\output_files\stack.asm.rpt
.....\............\stack.done
.....\............\stack.fit.rpt
.....\............\stack.fit.smsg
.....\............\stack.fit.summary
.....\............\stack.flow.rpt
.....\............\stack.jdi
.....\............\stack.map.rpt
.....\............\stack.map.summary
.....\............\stack.pin
.....\............\stack.sof
.....\............\stack.sta.rpt
.....\............\stack.sta.summary
.....\simulation\stack_tb.cr.mti
.....\..........\stack_tb.mpf
.....\..........\stack_tb.v
.....\..........\stack_tb.v.bak
.....\..........\transcript
.....\..........\vsim.wlf
.....\..........\work\stack\verilog.prw
.....\..........\....\.....\verilog.psm
.....\..........\....\.....\_primary.dat
.....\..........\....\.....\_primary.dbs
.....\..........\....\.....\_primary.vhd
.....\..........\....\....._tb\verilog.prw
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