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piso8_ok

  • Category : VHDL-FPGA-Verilog
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  • Update : 2014-12-08
  • Size : 153kb
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  • Author :H****
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Serial to parallel conversion, VHDL version, epm570t100c chip
Packet file list
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piso8_ok
........\db
........\..\piso8.asm.qmsg
........\..\piso8.asm_labs.ddb
........\..\piso8.cbx.xml
........\..\piso8.cmp.cdb
........\..\piso8.cmp.hdb
........\..\piso8.cmp.kpt
........\..\piso8.cmp.logdb
........\..\piso8.cmp.rdb
........\..\piso8.cmp.tdb
........\..\piso8.cmp0.ddb
........\..\piso8.dbp
........\..\piso8.db_info
........\..\piso8.eco.cdb
........\..\piso8.eds_overflow
........\..\piso8.fit.qmsg
........\..\piso8.hier_info
........\..\piso8.hif
........\..\piso8.map.cdb
........\..\piso8.map.hdb
........\..\piso8.map.logdb
........\..\piso8.map.qmsg
........\..\piso8.pre_map.cdb
........\..\piso8.pre_map.hdb
........\..\piso8.psp
........\..\piso8.rtlv.hdb
........\..\piso8.rtlv_sg.cdb
........\..\piso8.rtlv_sg_swap.cdb
........\..\piso8.sgdiff.cdb
........\..\piso8.sgdiff.hdb
........\..\piso8.signalprobe.cdb
........\..\piso8.sim.hdb
........\..\piso8.sim.qmsg
........\..\piso8.sim.rdb
........\..\piso8.sim_ori.vwf
........\..\piso8.sld_design_entry.sci
........\..\piso8.sld_design_entry_dsc.sci
........\..\piso8.syn_hier_info
........\..\piso8.tan.qmsg
........\..\wed.zsf
........\piso8.asm.rpt
........\piso8.done
........\piso8.fit.rpt
........\piso8.fit.smsg
........\piso8.fit.summary
........\piso8.flow.rpt
........\piso8.map.rpt
........\piso8.map.summary
........\piso8.pin
........\piso8.pof
........\piso8.qpf
........\piso8.qsf
........\piso8.qws
........\piso8.sim.rpt
........\piso8.tan.rpt
........\piso8.tan.summary
........\piso8.vhd
........\piso8.vwf
........\piso程序逐行解释.doc
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