(1) Design UART receiver module receives serial data (RS232 serial communication) the PC to the FPGA (2) Design UART transmit module on FPGA, the hexadecimal value of the data received the PC plus one re-sent to the PC

UART\adder.bsf
....\adder.vhd
....\adder.vhd.bak
....\adder.vwf
....\db\add_sub_1ph.tdf
....\..\add_sub_4rh.tdf
....\..\add_sub_5rh.tdf
....\..\add_sub_8rh.tdf
....\..\add_sub_9rh.tdf
....\..\add_sub_ish.tdf
....\..\add_sub_lsh.tdf
....\..\add_sub_msh.tdf
....\..\add_sub_nsh.tdf
....\..\mux_cfc.tdf
....\..\mux_hfc.tdf
....\..\mux_jcc.tdf
....\..\prev_cmp_UART.asm.qmsg
....\..\prev_cmp_UART.fit.qmsg
....\..\prev_cmp_UART.map.qmsg
....\..\prev_cmp_UART.qmsg
....\..\prev_cmp_UART.sim.qmsg
....\..\prev_cmp_UART.tan.qmsg
....\..\UART.asm.qmsg
....\..\UART.cbx.xml
....\..\UART.cmp.bpm
....\..\UART.cmp.cdb
....\..\UART.cmp.ecobp
....\..\UART.cmp.hdb
....\..\UART.cmp.logdb
....\..\UART.cmp.rdb
....\..\UART.cmp.tdb
....\..\UART.cmp0.ddb
....\..\UART.cmp_bb.cdb
....\..\UART.cmp_bb.hdb
....\..\UART.cmp_bb.logdb
....\..\UART.cmp_bb.rcf
....\..\UART.dbp
....\..\UART.db_info
....\..\UART.eco.cdb
....\..\UART.eds_overflow
....\..\UART.fit.qmsg
....\..\UART.fnsim.hdb
....\..\UART.fnsim.qmsg
....\..\UART.hier_info
....\..\UART.hif
....\..\UART.map.bpm
....\..\UART.map.cdb
....\..\UART.map.ecobp
....\..\UART.map.hdb
....\..\UART.map.logdb
....\..\UART.map.qmsg
....\..\UART.map_bb.cdb
....\..\UART.map_bb.hdb
....\..\UART.map_bb.logdb
....\..\UART.pre_map.cdb
....\..\UART.pre_map.hdb
....\..\UART.psp
....\..\UART.pss
....\..\UART.rtlv.hdb
....\..\UART.rtlv_sg.cdb
....\..\UART.rtlv_sg_swap.cdb
....\..\UART.sgdiff.cdb
....\..\UART.sgdiff.hdb
....\..\UART.signalprobe.cdb
....\..\UART.sim.cvwf
....\..\UART.sim.hdb
....\..\UART.sim.qmsg
....\..\UART.sim.rdb
....\..\uart.sim.vwf
....\..\UART.simfam
....\..\UART.sld_design_entry.sci
....\..\UART.sld_design_entry_dsc.sci
....\..\UART.syn_hier_info
....\..\UART.tan.qmsg
....\..\UART.tis_db_list.ddb
....\..\wed.wsf
....\frediv.bsf
....\frediv.vhd
....\frediv.vhd.bak
....\frediv.vwf
....\receiver.bsf
....\receiver.vhd
....\receiver.vhd.bak
....\receiver.vwf
....\transfer.bsf
....\transfer.vhd
....\transfer.vhd.bak
....\transfer.vwf
....\UART.asm.rpt
....\UART.bdf
....\uart.cdf
....\UART.done
....\uart.dpf
....\uart.fit.eqn
....\UART.fit.rpt
....\UART.fit.smsg
....\UART.fit.summary
....\UART.flow.rpt
....\uart.map.eqn
....\UART.map.rpt

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．