test bench of EEPROM write and read for FPGA

e2prom_w_r\e2prom_w_r.cr.mti
..........\e2prom_w_r.mpf
..........\e2prom_w_r.v
..........\e2prom_w_r.v.bak
..........\testbench.v
..........\testbench.v.bak
..........\vsim.wlf
..........\work\e2prom_w_r\verilog.asm
..........\....\..........\_primary.dat
..........\....\..........\_primary.vhd
..........\....\testbench\verilog.asm
..........\....\.........\_primary.dat
..........\....\.........\_primary.vhd
..........\....\_info
..........\....\.opt\work_e2prom_w_r_fast.dt2
..........\....\....\work_testbench_fast.asm
..........\....\....\work_testbench_fast.dt2
..........\....\....\work__info
..........\....\....\_deps
..........\....\e2prom_w_r
..........\....\testbench
..........\....\_opt
..........\....\_temp
..........\work
e2prom_w_r

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