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vga_dis_module

  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-03-15
  • Size : 3.25mb
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  • Author :李****
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Introduction - If you have any usage issues, please Google them yourself
VGA interface communication program, are welcome to download the exchange! Need to be modified when using the corresponding pin ~
Packet file list
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vga_dis_module\db\altsyncram_7qb1.tdf
..............\..\altsyncram_v7b1.tdf
..............\..\logic_util_heursitic.dat
..............\..\pll_module_altpll.v
..............\..\prev_cmp_vga_dis_module.qmsg
..............\..\vga_dis_module.amm.cdb
..............\..\vga_dis_module.asm.qmsg
..............\..\vga_dis_module.asm.rdb
..............\..\vga_dis_module.asm_labs.ddb
..............\..\vga_dis_module.cbx.xml
..............\..\vga_dis_module.cmp.bpm
..............\..\vga_dis_module.cmp.cdb
..............\..\vga_dis_module.cmp.hdb
..............\..\vga_dis_module.cmp.kpt
..............\..\vga_dis_module.cmp.logdb
..............\..\vga_dis_module.cmp.rdb
..............\..\vga_dis_module.cmp_merge.kpt
..............\..\vga_dis_module.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
..............\..\vga_dis_module.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
..............\..\vga_dis_module.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
..............\..\vga_dis_module.db_info
..............\..\vga_dis_module.fit.qmsg
..............\..\vga_dis_module.hier_info
..............\..\vga_dis_module.hif
..............\..\vga_dis_module.idb.cdb
..............\..\vga_dis_module.lpc.html
..............\..\vga_dis_module.lpc.rdb
..............\..\vga_dis_module.lpc.txt
..............\..\vga_dis_module.map.bpm
..............\..\vga_dis_module.map.cdb
..............\..\vga_dis_module.map.hdb
..............\..\vga_dis_module.map.kpt
..............\..\vga_dis_module.map.logdb
..............\..\vga_dis_module.map.qmsg
..............\..\vga_dis_module.map_bb.cdb
..............\..\vga_dis_module.map_bb.hdb
..............\..\vga_dis_module.map_bb.logdb
..............\..\vga_dis_module.pre_map.cdb
..............\..\vga_dis_module.pre_map.hdb
..............\..\vga_dis_module.rtlv.hdb
..............\..\vga_dis_module.rtlv_sg.cdb
..............\..\vga_dis_module.rtlv_sg_swap.cdb
..............\..\vga_dis_module.sgdiff.cdb
..............\..\vga_dis_module.sgdiff.hdb
..............\..\vga_dis_module.sld_design_entry.sci
..............\..\vga_dis_module.sld_design_entry_dsc.sci
..............\..\vga_dis_module.smart_action.txt
..............\..\vga_dis_module.sta.qmsg
..............\..\vga_dis_module.sta.rdb
..............\..\vga_dis_module.sta_cmp.8_slow_1200mv_85c.tdb
..............\..\vga_dis_module.syn_hier_info
..............\..\vga_dis_module.tiscmp.fastest_slow_1200mv_0c.ddb
..............\..\vga_dis_module.tiscmp.fastest_slow_1200mv_85c.ddb
..............\..\vga_dis_module.tiscmp.fast_1200mv_0c.ddb
..............\..\vga_dis_module.tiscmp.slow_1200mv_0c.ddb
..............\..\vga_dis_module.tiscmp.slow_1200mv_85c.ddb
..............\..\vga_dis_module.tis_db_list.ddb
..............\..\vga_dis_module.tmw_info
..............\greybox_tmp\cbx_args.txt
..............\incremental_db\compiled_partitions\vga_dis_module.db_info
..............\..............\...................\vga_dis_module.root_partition.cmp.cdb
..............\..............\...................\vga_dis_module.root_partition.cmp.dfp
..............\..............\...................\vga_dis_module.root_partition.cmp.hdb
..............\..............\...................\vga_dis_module.root_partition.cmp.kpt
..............\..............\...................\vga_dis_module.root_partition.cmp.logdb
..............\..............\...................\vga_dis_module.root_partition.cmp.rcfdb
..............\..............\...................\vga_dis_module.root_partition.map.cdb
..............\..............\...................\vga_dis_module.root_partition.map.dpi
..............\..............\...................\vga_dis_module.root_partition.map.hbdb.cdb
..............\..............\...................\vga_dis_module.root_partition.map.hbdb.hb_info
..............\..............\...................\vga_dis_module.root_partition.map.hbdb.hdb
..............\..............\...................\vga_dis_module.root_partition.map.hbdb.sig
..............\..............\...................\vga_dis_module.root_partition.map.hdb
..............\..............\...................\vga_dis_m
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