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DS18B20_ok

  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-04-08
  • Size : 581kb
  • Downloaded :0次
  • Author :胡****
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Introduction - If you have any usage issues, please Google them yourself
DS18B20 to UART output,Two bytes each temperature
Packet file list
(Preview for download)


top_1_ok\db\logic_util_heursitic.dat
........\..\prev_cmp_top.qmsg
........\..\top.amm.cdb
........\..\top.asm.qmsg
........\..\top.asm.rdb
........\..\top.asm_labs.ddb
........\..\top.cbx.xml
........\..\top.cmp.cdb
........\..\top.cmp.hdb
........\..\top.cmp.kpt
........\..\top.cmp.logdb
........\..\top.cmp.rdb
........\..\top.cmp0.ddb
........\..\top.db_info
........\..\top.fit.qmsg
........\..\top.hier_info
........\..\top.hif
........\..\top.idb.cdb
........\..\top.lpc.html
........\..\top.lpc.rdb
........\..\top.lpc.txt
........\..\top.map.cdb
........\..\top.map.hdb
........\..\top.map.logdb
........\..\top.map.qmsg
........\..\top.map.rdb
........\..\top.pre_map.cdb
........\..\top.pre_map.hdb
........\..\top.root_partition.map.reg_db.cdb
........\..\top.routing.rdb
........\..\top.rtlv.hdb
........\..\top.rtlv_sg.cdb
........\..\top.rtlv_sg_swap.cdb
........\..\top.sgdiff.cdb
........\..\top.sgdiff.hdb
........\..\top.sim_ori.vwf
........\..\top.sld_design_entry.sci
........\..\top.sld_design_entry_dsc.sci
........\..\top.smart_action.txt
........\..\top.smp_dump.txt
........\..\top.sta.qmsg
........\..\top.sta.rdb
........\..\top.sta_cmp.5_slow.tdb
........\..\top.syn_hier_info
........\..\top.tis_db_list.ddb
........\..\top.tmw_info
........\..\wed.zsf
........\DS18B20.tcl
........\DS18B20.vhd
........\gen_div.vhd
........\incremental_db\compiled_partitions\top.db_info
........\..............\...................\top.root_partition.map.kpt
........\..............\README
........\top.asm.rpt
........\top.cdf
........\top.done
........\top.fit.rpt
........\top.fit.smsg
........\top.fit.summary
........\top.flow.rpt
........\top.jdi
........\top.map.rpt
........\top.map.summary
........\top.pin
........\top.pof
........\top.qpf
........\top.qsf
........\top.qws
........\top.sim.rpt
........\top.sta.rpt
........\top.sta.summary
........\top.tan.rpt
........\top.tan.summary
........\top.vhd.bak
........\top.vwf
........\top_assignment_defaults.qdf
........\uart_t.vhd
........\incremental_db\compiled_partitions
........\db
........\incremental_db
top_1_ok
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