FIR filter design based on FPGA, including the design and top-level schematic of each module.

FIR_OVER\0001dingceng222\add101011.vhd
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........\...............\db\dingceng222.asm.qmsg
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........\...............\dingceng222.fit.rpt
........\...............\dingceng222.fit.smsg
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........\...............\incremental_db\compiled_partitions\dingceng222.root_partition.cmp.atm
........\...............\..............\...................\dingceng222.root_partition.cmp.dfp
........\...............\..............\...................\dingceng222.roo

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