vhdl code of 16 bit register which has 8 bit input and 16 bit output at second count

reg16\.lso
.....\iseconfig\reg.xreport
.....\.........\reg16.projectmgr
.....\reg.bld
.....\reg.cmd_log
.....\reg.fdo
.....\reg.gyd
.....\reg.lso
.....\reg.mfd
.....\reg.nga
.....\reg.ngc
.....\reg.ngd
.....\reg.ngr
.....\reg.pad
.....\reg.pnx
.....\reg.prj
.....\reg.rpt
.....\reg.stx
.....\reg.syr
.....\reg.udo
.....\reg.vhd
.....\reg.vm6
.....\reg.xml
.....\reg.xst
.....\reg16.gise
.....\reg16.xise
.....\reg_build.xml
.....\reg_envsettings.html
.....\reg_ngdbuild.xrpt
.....\reg_pad.csv
.....\reg_summary.html
.....\reg_vhdl.prj
.....\reg_wave.fdo
.....\reg_xst.xrpt
.....\tagui.out
.....\tmperr.err
.....\transcript
.....\vsim.wlf
.....\webtalk_pn.xml
.....\wlftgzdzfq
.....\.ork\reg\behavioral.dat
.....\....\...\behavioral.dbs
.....\....\...\behavioral.psm
.....\....\...\_primary.dat
.....\....\...\_primary.dbs
.....\....\_info
.....\xlnx_auto_0_xdb\cst.xbcd
.....\.st\work\hdllib.ref
.....\...\....\hdpdeps.ref
.....\...\....\sub00\vhpl00.vho
.....\...\....\.....\vhpl01.vho
.....\_ngo\netlist.lst
.....\.xmsgs\cpldfit.xmsgs
.....\......\ngdbuild.xmsgs
.....\......\pn_parser.xmsgs
.....\......\tsim.xmsgs
.....\......\xst.xmsgs
.....\xst\dump.xst\reg.prj\ngx\notopt
.....\...\........\.......\...\opt
.....\...\........\.......\ngx
.....\...\........\reg.prj
.....\...\work\sub00
.....\reg_html\fit
.....\........\tim
.....\work\reg
.....\....\_temp
.....\xst\dump.xst
.....\...\projnav.tmp
.....\...\work
.....\iseconfig
.....\reg_html
.....\work
.....\xlnx_auto_0_xdb
.....\xst
.....\_ngo
.....\_xmsgs
reg16

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