DSP Architechture using Verilog. (the concept of the programm differ the original)

_xmsgs\pn_parser.xmsgs
......\xst.xmsgs
iseconfig\dsp.projectmgr
.........\sensor.xreport
.........\sensor_top.xreport
xst\work\work.sdbl
...\....\work.sdbx
BaudRateGen.v
BaudRateGen_summary.html
dsp.gise
dsp.xise
INT_SRC.v
master.lso
master.prj
master.stx
master.xst
pfxadd.v
pfxint.v
s1.v
sensor.lso
sensor.prj
sensor.stx
sensor.xst
sensor_summary.html
sensor_top.v
sensor_top_summary.html
sensordecoder.v
sensorencoder.v
slave.lso
slave.prj
slave.stx
slave.xst
xst\projnav.tmp
...\work
_xmsgs
ipcore_dir
iseconfig
xst

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