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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-04-15
  • Size : 55kb
  • Downloaded :0次
  • Author :董***
  • About : Nobody
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Modelsim testbench simple test project, including source code and testbench files
Packet file list
(Preview for download)


DFF12\compile_and_launch.tcl
.....\DFF12.cr.mti
.....\DFF12.mpf
.....\DFF12.slx
.....\DFF12.vhd
.....\DFF12_vhd_tst.vht
.....\DFF12_vhd_tst.vht.bak
.....\DFF12_vhd_tst.vht~
.....\modelsim.ini
.....\transcript
.....\vsim.wlf
.....\work\dff12\beheave.asm
.....\....\.....\beheave.dat
.....\....\.....\beheave.dbs
.....\....\.....\beheave.rw
.....\....\.....\_primary.dat
.....\....\.....\_primary.dbs
.....\....\_info
.....\....\_vmake
.....\....\dff12
.....\....\_temp
.....\work
DFF12
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