It s a VERILOG code to initiate a I2C protocol on an FPGA and an EEPROM of 512 KB

proyecto I2C
............\usage_statistics_webtalk.html
............\_impact.cmd
............\impact_impact.xwbt
............\esque
............\Top.v
............\webtalk_impact.xml
............\step3.v
............\Top.ucf
............\impact.xsl
............\Makefile
............\build
............\.....\Top.lso
............\.....\project.ngc_xst.xrpt
............\.....\project.src
............\.....\project.log
............\.....\project.xst
............\.....\_xmsgs
............\.....\......\xst.xmsgs

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．