Display driver works based EP3C16 of VGA. Clock 40M, pictures stored in the ROM of the FPGA, VGA display resolution is 800* 600* 60Hz, store pictures need 800* 600 (bit), due to EP3C16 the ROM is not big enough, ROM for storing the contents of 8bit* 30000 monitor content for the upper and lower half of the screen show the ROM content, display the same picture. ROM are controlled by the change in the address line.

vga_driver
..........\VGA_driver.asm.rpt
..........\VGA_driver.cdf
..........\VGA_driver.done
..........\VGA_driver.fit.rpt
..........\VGA_driver.fit.smsg
..........\VGA_driver.fit.summary
..........\VGA_driver.flow.rpt
..........\VGA_driver.jdi
..........\VGA_driver.map.rpt
..........\VGA_driver.map.smsg
..........\VGA_driver.map.summary
..........\VGA_driver.pin
..........\VGA_driver.qpf
..........\VGA_driver.qsf
..........\VGA_driver.sof
..........\VGA_driver.sta.rpt
..........\VGA_driver.sta.summary
..........\VGA_driver.v
..........\VGA_driver.v.bak
..........\VGA_driver_description.txt
..........\db
..........\..\VGA_driver.amm.cdb
..........\..\VGA_driver.asm.qmsg
..........\..\VGA_driver.asm.rdb
..........\..\VGA_driver.asm_labs.ddb
..........\..\VGA_driver.cbx.xml
..........\..\VGA_driver.cmp.bpm
..........\..\VGA_driver.cmp.cdb
..........\..\VGA_driver.cmp.hdb
..........\..\VGA_driver.cmp.kpt
..........\..\VGA_driver.cmp.logdb
..........\..\VGA_driver.cmp.rdb
..........\..\VGA_driver.cmp_merge.kpt
..........\..\VGA_driver.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
..........\..\VGA_driver.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
..........\..\VGA_driver.db_info
..........\..\VGA_driver.fit.qmsg
..........\..\VGA_driver.hier_info
..........\..\VGA_driver.hif
..........\..\VGA_driver.idb.cdb
..........\..\VGA_driver.lpc.html
..........\..\VGA_driver.lpc.rdb
..........\..\VGA_driver.lpc.txt
..........\..\VGA_driver.map.bpm
..........\..\VGA_driver.map.cdb
..........\..\VGA_driver.map.hdb
..........\..\VGA_driver.map.kpt
..........\..\VGA_driver.map.logdb
..........\..\VGA_driver.map.qmsg
..........\..\VGA_driver.map_bb.cdb
..........\..\VGA_driver.map_bb.hdb
..........\..\VGA_driver.map_bb.logdb
..........\..\VGA_driver.pre_map.cdb
..........\..\VGA_driver.pre_map.hdb
..........\..\VGA_driver.rpp.qmsg
..........\..\VGA_driver.rtlv.hdb
..........\..\VGA_driver.rtlv_sg.cdb
..........\..\VGA_driver.rtlv_sg_swap.cdb
..........\..\VGA_driver.sgate.rvd
..........\..\VGA_driver.sgate_sm.rvd
..........\..\VGA_driver.sgdiff.cdb
..........\..\VGA_driver.sgdiff.hdb
..........\..\VGA_driver.sld_design_entry.sci
..........\..\VGA_driver.sld_design_entry_dsc.sci
..........\..\VGA_driver.smart_action.txt
..........\..\VGA_driver.sta.qmsg
..........\..\VGA_driver.sta.rdb
..........\..\VGA_driver.sta_cmp.8_slow_1200mv_85c.tdb
..........\..\VGA_driver.syn_hier_info
..........\..\VGA_driver.tis_db_list.ddb
..........\..\VGA_driver.tiscmp.fast_1200mv_0c.ddb
..........\..\VGA_driver.tiscmp.fastest_slow_1200mv_0c.ddb
..........\..\VGA_driver.tiscmp.fastest_slow_1200mv_85c.ddb
..........\..\VGA_driver.tiscmp.slow_1200mv_0c.ddb
..........\..\VGA_driver.tiscmp.slow_1200mv_85c.ddb
..........\..\altsyncram_0u91.tdf
..........\..\altsyncram_30a1.tdf
..........\..\altsyncram_jv14.tdf
..........\..\altsyncram_ls14.tdf
..........\..\altsyncram_lv14.tdf
..........\..\altsyncram_n791.tdf
..........\..\altsyncram_nv14.tdf
..........\..\altsyncram_ov14.tdf
..........\..\altsyncram_rv14.tdf
..........\..\altsyncram_st91.tdf
..........\..\cmpr_efc.tdf
..........\..\cmpr_gfc.tdf
..........\..\cmpr_ifc.tdf
..........\..\cntr_3fi.tdf
..........\..\cntr_4fi.tdf
..........\..\cntr_5fi.tdf
..........\..\cntr_6fi.tdf
..........\..\cntr_78j.tdf
..........\..\cntr_7fi.tdf
..........\..\cntr_8fi.tdf
..........\..\cntr_jdi.tdf
..........\..\cntr_p1j.tdf
..........\..\cntr_v7j.tdf
..........\..\decode_09a.tdf

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