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  • Category : VHDL-FPGA-Verilog
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  • Update : 2015-05-14
  • Size : 9kb
  • Downloaded :0次
  • Author :fron****
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Introduction - If you have any usage issues, please Google them yourself
This “core” is actually two cores – an HDB3/HDB2/B3ZS Encoder that converts NRZ data into P and N pulses according to ITU-T G.703, and a HDB3/HDB2/B3ZS Decoder that converts P and N pulses into NRZ data according to ITU-T G.703. Note: HDB2 and B3ZS are different names for the same encoding. HDB3 is typically used to encode data at 2.048 (E1), 8.448 (E2) and 34.368Mb/s (E3) B3ZS is typically used to encode data at 44.736Mb/s (T3)
Packet file list
(Preview for download)


hdbn_tb.vhd
hdbnd.vhd
hdbne.vhd
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